Debug/validation suite tests fast DDR3 memory systems

Debug/validation suite tests fast DDR3 memory systems

Made up of software and hardware that targets either board-level or embedded memory applications, the DDR3 protocol debug and validation test suite is said to be the industry’s first DDR3 test tool, as well as being the most comprehensive. The suite encompasses the industry’s fastest (2.0-Gtransfer/s) full-channel 16962A logic analysis module, probes for DDR3 BGA and DIMM devices, and a DDR3 compliance and performance software environment.

With 2-GHz trigger sequence speed, the logic module can reliably trigger and capture DDR3 1600 signals and, for embedded systems, the W3630A Series probe (see figure) provides direct access to the solder balls of a BGA DRAM with low loading and minimal impact on signal integrity. The N4835A DDR3 slot interposer probes server and desktop applications, enabling access to high-speed (up to 1.6 Gtransfers/s) memory buses through on-board slot connectors. Probes are used with scopes and logic analyzers for physical layer and functional test.

The B4622A DDR2/3 protocol compliance and analysis environment provides timing and protocol violation checks, an automated physical address trigger setup tool, and an overview of system performance through both bus statistical information and histogram views of address access. (Embedded configurations from $101,000; system configurations from $216,000 — software, probes available now, logic analysis modules available in May.)

Agilent Technologies , Santa Clara , CA
Sales 800-829-4444
http://www.agilent.com