Design a mixed-signal chip, win prizes, create a new market

By Rich Quinnell, editor-in-chief

While digital chip designers have long been able to use FPGAs to prototype and test their ideas, mixed-signal designers have typically relied on discrete devices for prototyping. But configurable, mixed-signal chips are available to facilitate such designs, and to boost awareness of them, the vendor — Silego — has launched a 10-challenge contest series with prizes culminating in a Macbook or Surface, depending on the winner’s preference. Contest co-sponsor efabless wants contestants to know that their mixed-signal design skills have a community market, as well.

The Go Configure Challenge Series that Silego and efabless are sponsoring consists of 10 challenges spaced out between October 2 and December 11, 2017, with two challenges released every two weeks. All of the challenges involve the design of a common mixed-signal function using Silego’s GreenPAK configurable mixed-signal ICs (CMIC) via the company’s free development software. The first two challenges are to design a three-rail power rail sequencer and a sequencer with programmable timing. Such sequencers are often needed to prevent damage during startup of systems that involve multiple voltage levels, so addressing the challenge is not simply an intellectual exercise but can result in a useful design.

Contestants will have two weeks to create and submit their designs for each challenge, with prize winners announced monthly. All those entering any of the contests will receive GreenPAK development kits along with what the company calls “cool Silego swag,” and challenge winners will receive Amazon gift cards and a choice of electronic devices such as smartwatches, Bluetooth speakers, and wireless earbuds. The challenges are independent of one another, so contestants can enter one, several, or all as desired and can submit multiple designs for each challenge, although only the last one received will be judged. The judging criteria are objectively defined and available here.

While raising awareness of Silego’s CMIC technology is part of the objective behind the contest series, there is more to the story than that. Silego and efabless hope that this competition will jumpstart the creation of a crowd-sourced chip design market. This market would allow independent circuit designers to sell their design services to companies developing ASICs on a circuit block basis. This approach would help fill a need for circuit design that, while important to the ASIC design, may be too small for conventional contract design approaches to be cost-effective.

According to Michael Wishart, CEO of efabless, his company has developed tools and processes that would support such a market. The company works with customers to define the performance specifications the design must meet, then puts those specifications out for competitive design. Designers work with the efabless tools to create and evaluate their designs against the specifications, using simulations based on the customer’s chosen foundry process. The customer then purchases the resulting IP that best meets its needs, and the non-winning designers can offer their creations to other potential customers through an open marketplace that efabless hosts.

This approach isolates the independent designer from the detailed foundry process information that would otherwise require non-disclosure agreements and other logistical barriers, opening the design opportunity to a much wider community. That openness in mixed-signal IP design is similar to the open-source movement in software and will likewise foster an explosion in innovation, the companies hope.

The contest thus supports the business objectives for both companies. The mixed-signal design community gets an introduction to Silego’s configurable mixed-signal chip product as well as to the efabless design market. Together, the two companies expect this expanded awareness to stimulate the growth of an open market for independent mixed-signal IC designers comparable to the market for app developers on mobile devices. With the two companies together offering a rapid prototyping environment, access to foundry-qualified, simulations, and access to potential customers in an open, competitive environment, they may well succeed in this aim.

Designers seeking to prove their mixed-signal design skills can learn the details about and enter the Go Configure Challenge by entering the contest here.