DSP chip calculates histograms at 40 MHz
The HSP48410 is a histogrammer-accumulator IC that suits
image-enhancement and signal analysis. It runs at 40 MHz and deals with
10-bit pixels. A flash reset empties the buffer and all internal
locations. An asynchronous host interface matches microprocessors for
control. Several modes of operation can be used for equalization, image
equalization, bin accumulation, and delay-and-subtract. Two HSP48410
chips can do real-time adaptive equalization. One chip acts as a dedicated
lookup table while the other accumulates the histogram. During the
blanking interval, the histogram is copied into the LUT, where it is used
for equalizing the next frame. (HSP48410, 84-pin PGA, 33 MHz, $52.01 ea/1,
000; 40 MHz, $59.81 ea/1,000–available now.) Harris Semiconductor Corp.
Melbourne, FL Information 800-4-HARRIS, ext. 1040
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