Dual ±3-A buck-regulator suits DDR memory

Dual ±3-A buck-regulator suits DDR memory

The LTC3618 is a dual monolithic synchronous step-down switching regulator. It generates the supply voltage and the bus termination voltage for DDR/DDR2/DDR3 and future standard memory applications requiring both sourcing and sinking of current. The output of the step-down regulator offers a VDDQ supply capable of ±3-A output. An internal resistor divider sets the VTT DDR termination supply and VTTR reference voltages equal to half the voltage applied to the VDDQIN input, with output current capability of ±3 A at VTT and ±10 mA at VTTR. The VTT output is capable of operation down to 0.5 V to support all DDR standards.

The buck regulator operates from an input voltage range of 2.25 to 5.5 V and allows switching frequencies from 400 kHz to 4 MHz. The internal synchronous top and bottom power switches have an RDS(on) of 75 mΩ and 55 mΩ, respectively. This enables the regulator to attain efficiencies as high as 94%. It is offered in 24-pin thermally enhanced 4 x 4-mm QFN and TSSOP packages. ($4.10 ea/1,000 — available now.)

By Paul O’Shea

Linear Technology , Milpitas , CA
Sales Office 408-428-2050
www.linear.com