EDA tool supports hot-swap control

Version 5.2 of the PAC-Designer mixed-signal design tool suite now supports two new higher-performance Power Manager II products: the ispPAC-POWR1014-2 and ispPAC-POWR1014A-2 devices. The POWR1014/A-2 devices suit integrating hot-swap control, voltage rail supervision, and power-supply-sequencing ICs. PAC-Designer 5.2 software also supports an expanded input operating frequency range of 40 to 400 MHz for ispClock5400D devices and a new graphical editor for phase and time skew programming.

The PAC-Designer 5.2 software provides a new VHDL or Verilog HDL export feature to extract simulation models of the embedded PLD block featured on all Lattice Power Manager II family devices. This allows for functional verification of sequence and supervisory logic by the Aldec Active-HDL Lattice Web Edition simulator. (Free — available now.)

Lattice Semiconductor , Hillsboro , OR
Brian Kiernan 503-268-8739

http://www.latticesemi.com/products/designsoftware/pacdesigner