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Experimental BiCMOS technology yields state-of-the-art performance

RP-OL3.SEP

Experimental BiCMOS technology yields state-of-the-art performance

Researchers at the IBM T. J. Watson Research Center in Yorktown Heights,
NY, have developed a BiCMOS technology that more than doubles the
performance of previous examples of such technology. According to the
company, the experimental version of BiCMOS “could lead to an
implementation in tomorrow's computers with better performance than either
pure CMOS or pure bipolar technology.” The IBM process combines 0.
25-micron CMOS devices and 60-GHz fT double-poly self-aligned bipolar
devices. Currently, state-of-the-art CMOS-only circuits use 0.25-micron
lengths. Similarly, double-poly 60-GHz fT bipolar devices with
ion-implanted bases represent the highest-performance bipolar transistor
technology. Previously, integrating the two technologies on a single chip
and at the same time maintaining their individual advantageous
characteristics presented a major challenge. Among other problems, the
incompatibility of the heat cycles of the CMOS and bipolar processes, as
well as different vertical structures, usually resulted in a
less-than-optimal combined performance. For example, previous BiCMOS
circuits have been reported as achieving performance up to only about 30
GHz. The IBM researchers were able to maintain optimal performance in the
individual processes by decoupling the CMOS and bipolar fabrication steps.
First, the CMOS was defined, followed by a major part of the heat cycle;
then the bipolar was fabricated, followed by the rest of the CMOS. As a
result of this process, each of the device types experienced heat cycles
essentially the same as in the individual processes. The experimental
version of BiCMOS was demonstrated in several kinds of circuits. The
researchers were able to maintain a CMOS ring oscillation delay per stage
of 54 ps at 2.5 V–matching the performance available in CMOS-only
technology. The bipolar transistors, with 0.4-micron minimum emitter
width, achieved maximum cutoff frequency at a collector-to-emitter voltage
of 1.5 V.
–Richard Pell Jr.

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