Field-programmable power is essential for ASSPs

Field-programmable power is essential for ASSPs

The benefits of using an FPPS controller IC are analogous to upgrading processor firmware in the field for system power

BY TIM MALONEY
Exar, Fremont, CA
http://www.exar.com

Years ago, systems designers had it relatively easy with respect to system power supplies. Logic ran on 5-V power; hard- and floppy-disk drives needed a 12-V supply; and the rest of the system would operate off those two supply voltages plus perhaps one more negative-voltage supply.

Those days are long gone. Today’s complex logic devices (FPGAs, ASICs, SoCs, ASSPs, etc.) have far more complex power requirements. Just one such chip in a system may need three or four supply voltages. Worse, the order and timing in which these multiple supply voltages come up can be critical to successful system initialization. The order in which these voltages switch off during power-down operations may also be critically important to proper chip shutdown and can also be critical to preventing supply-induced damage to the IC.

Further, power subsystems must actively interact with many of today’s complex systems in real time and must permit real-time reconfiguration based on rapidly fluctuating line and load requirements. In short, power supply subsystem design for today’s complex digital systems calls for far more thought and consideration than ever before, prompting the development of power-management subsystems—like the one shown in Fig. 1 —designed to meet the increasingly complex needs of today’s system designs. System designers have less time to think about these issues than ever because they’re far more concerned with getting their hugely complex systems operational.

Fig. 1. Simplified block diagram of a system design incorporating a power-management subsystem.

Today’s most advanced FPGAs, media processors, and microcontrollers are very different animals but they all share the need for multiple power supplies. For example, Table 1 lists supply voltages required by many popular FPGAs:

Table 1. Supply voltages for Xilinx FPGA families and generations

Note that these voltage requirements aren’t necessarily fixed for a given design. Different programming patterns often require different supply voltages for optimum operation. Further, field reprogramming an FPGA-based design often requires supply-voltage adjustments and a reprogrammable power supply might be handy in such a situation.

Test chips, operating modes

Advanced media processors and microcontrollers have similar supply-voltage requirements, but with a twist. Most processors introduced today have a variety of operating and power-saving modes (run, doze, sleep, deep sleep, data-retention, etc.) and different parts of the chip require different mode-dependent supply voltages.

Tables 2 and 3 list the various mode-dependent voltage requirements for two recent test chips: the NEC-PPP (Proof Point Project) low-power SoC and ARM 1176-IEM (Intelligent Energy Manager) processor, which features dynamic voltage and frequency scaling.

Both of these test chips are nanometer SoCs with multiple low-power modes. Both require multiple power supplies that vary with operating mode. Although these examples are test chips, they represent the kinds of devices that will shortly appear as commercial products. Many production SoCs already have similar power requirements. Again, programmable power supplies become almost a requirement when powering such devices.

Table 2. Operating modes and supply voltages for NEC-PPP test chip

Table 3. Operating modes and supply voltages for ARM 1176-IEM test chip

As with the FPGAs, the voltages listed in mode-dependent power-supply tables such as the ones shown in Tables 2 and 3 do not tell the whole story. All too often, systems designers must work with alpha, beta, or pre-release silicon and it’s not uncommon for supply-voltage requirements to change by the time production silicon becomes available. Here again, programmable power supplies easily accommodate late-stage design changes without redesigning hardware.

Last-minute changes to a system’s power supplies are not merely a theoretical problem. Such changes are increasingly common now that IC supply voltages can take on any value. Case in point, the development team for a high-performance, multi-gigabit Ethernet card used two Xilinx Virtex 6 FPGAs to implement substantial portions of the Ethernet logic.

The unique positioning for this Ethernet board is field upgradeability of the communications protocols and speeds. However, new programming patterns for the FPGAs also meant that the power supply voltages would also need reprogramming. The simple solution was to make the on-board power regulation field programmable as well and to include programming bits in the downloaded configuration bit stream to set the power supply levels, ramps, and timing appropriately.

IA second example is a low-cost set-top box based on a standard media processor (see block diagram in Fig. 2 ). The design is a small set-top box based on a standard media processor and DDR memory. The box was being sold to consumers through a very large media-content distributor, so it was a critically important sale to the set-top box developer.

Fig. 2. Set-top box block diagram.

Although the design generally worked, prototype set-top boxes experienced errors during certain processor-intensive operations. Experimentally, the design team discovered that increasing the processor’s core voltage from 1.2 to 1.37 V reduced the processor’s internal logic delays and eliminated the errors.

A nonprogrammable power supply could have been adjusted to run the processor core voltage at 1.37 V at all times but that would increase the processor’s power and energy consumption and raise the product’s operating temperature with a corresponding decrease in reliability and an increase in warranty costs. The team decided that a better approach was to use a programmable power supply that supplied the processor core with 1.2 V during less intensive operations and 1.37 V during speed-critical operations.

However, that’s not the end of this story. The DDR memory also had a problem. System simulation indicated that no series-termination resistors would be required and the system board was designed accordingly. During nominal operation, the prototypes worked as simulated, but worst-case memory patterns caused read/write failures. A board redesign could have added termination resistors but there was a faster, easier, and cheaper way to solve the problem — by slightly raising the DDR supply voltage from 2.5 to 2.515 V, which prevented a hardware redesign and avoided an increase in BOM cost.

Once it fully considered the implications of a field-programmable power supply (FPPS), the design team realized that firmware algorithms could analyze the set-top box’s performance and automatically tune each system component for optimum performance by adjusting the supply voltages. This sort of approach solves two problems. The first is failure due to manufacturing variability. The system can automatically handle box-to-box component variation by running test code and adjusting power supplies accordingly. The same algorithms can automatically compensate for component drift caused by aging, thus extending the useful life of the product. For a system like a set-top box that needs to reliably deliver paid-for content over years, this latter capability adds substantial value to the system in the eyes of the end customer and makes the design stand head and shoulders above competing set-top box designs.

An FPPS can handle the multiple uncertainties associated with system power-supply voltages without requiring late-stage modifications to the hardware design. It can also effectively deal with many power-supply-related problems that crop up after product manufacture with little more than a code download.

A controller IC for field-programmable power supply design

A simplified block diagram of an FPPS controller IC that provides all of the benefits of a field-programmable power supply without increasing (and often decreasing) the cost of power-supply design appears in the figure below, which shows the block diagram of Exar’s XRP7704 and XRP7740, two pin-compatible FPPS controller ICs.

Fig. XRP7704/7740 FPPS controller block diagram

The XRP7704 and XRP 7740 FPPS controller ICs incorporate all of the functions required to implement a 5-output FPPS. The chips contain four programmable switching voltage controllers with integrated FET drivers that can drive external power MOSFETs to create switching power supplies with current capacities of 5 to 16-A per channel for the XRP7704 and XRP7740 respectively. Power MOSFETs and a few additional passive devices are all that’s needed to implement four high-current, switching power sources operating at four different programmable supply voltages. Both devices contain a configurable linear, 100 mA, LDO voltage regulator that can supply a fifth system supply voltage (3.3 or 5 V). The configurable LDO regulator can be used as a keep-alive power supply.

In addition to the programmable supply voltages, the XRP7704 and XRP7740 can control the power-up and power-down characteristics of the voltage supplies (ramping speed and relative timing of supply voltages). The XRP7704 and XRP 7740 also incorporate several system-management functions including under-voltage and power-good monitoring, over-temperature operation and fault handling.

Configuration for both devices occurs through a PC-based software program called the Digital Power Studio, making the devices easy to configure and tune during the design stage of a project. The configuration data entered into the Digital Power Studio serves two important purposes. First, it drives an automated BOM generator built into the Digital Power Studio that creates a complete list of components—including part numbers and manufacturer recommendations—needed to fabricate the FPPS. Second, the configuration parameters determine the configuration settings for the configuration registers in the XRP7704 and XRP7740.

Exar’s programmable XRP7704 and XRP7740 FPPS controller ICs form the heart of an FPPS that can handle the multiple uncertainties associated with system power-supply voltages without requiring late-stage modifications to the hardware design.