Flash FPGAs take just 2 µW of static power

Flash FPGAs take just 2 µW of static power

Chips feature 10-K to 250-K system gates in a package as small as 3 x 3 mm

The AGLNxxx IGLOO nano FPGA device family comes in packages as small as 3 x 3 mm and have static power consumption of only 2 µW. The chips support 1.2 to 1.5-V core and I/O operation and feature an ultra-low-power Flash*Freeze mode with bus-hold capability and advanced I/O features, such as hot swapping and Schmitt trigger inputs.

Available in 10-K to 250-K gate versions, the series has up to 36 Kbits of dual-port SRAM and operates at –20° to 70°C. The chips have a 128-bit flash-based lock and a separate AES key to secure program information and include an AES decryption engine.

The arrays also feature a wide 1.5 to 250-MHz input frequency range and up to 71 user I/Os. (Ea/10,000: From $0.69 in QNG48 package or $0.49 as known-good die — available now.)

Actel , Mountain View , CA
Sales 650-318-4200

http://www.actel.com