FPGA design suite provides simpler, smarter methods

FPGA design suite provides simpler, smarter methods

ISE Design Suite 11.1 is said to be the industry’s first FPGA design solution with fully interoperable domain-specific design flows. The tool’s four configurations for logic (VHDL/Verilog), DSP, embedded processing, and system-level design align to user-specific methodologies. The suite can reduce dynamic power consumption by, on average, 10%, raise FMAX by 10%, and improve utilization by 10%.

The suite works with Xilinx FPGAs. All configurations include ISE Foundation, ISE Simulator, PlanAhead Design and Analysis Tool, ChipScope Pro Debug and Serial I/O Toolkit, an extensive catalog of foundation IP, and bit-stream generation/device programming utilities. The design flow is optimized to facilitate more design iterations per day with new multithreaded place-and-route capabilities, SmartXplorer, and ExploreAhead support for distributed-processing techniques, and second-generation SmartGuide technology delivering 2X faster compile and incremental run times. A free 30-day evaluation version is available. (Node-locked license, $2,995 to $4,595 — available now.)

Xilinx , San Jose , CA
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http://www.xilinx.com