FPGA design tool adds enhancements

The Version 7.0 Service Pack 2 of the ispLEVER FPGA design tool suite for Lattice devices adds enhancements to the power calculator module, new versions of Synplicity’s Synplify synthesis and Mentor Graphics’ Precision RTL synthesis, and new support for the LatticeMico32 embedded open source MPU core.

The MPU core supports multiple bus arbitration schemes, allows VHDL users to implement the core, and adds Linux based development tools. ispLEVER provides a complete set of tools for project management, IP integration, design planning, place and route, in-system logic analysis, and power optimization, and can be used with Windows, UNIX or Linux platforms. (Update, free; full pkg, $895available now.)

Lattice Semiconductor , Hillsboro , OR
Brian Kiernan 503-268-8739

http://www.latticesemi.com