FPGA IP available for 40/100 GbE

The 40-Gbit/s and 100-Gbit/s Ethernet intellectual property (IP) cores are effective tools for building systems requiring very high throughput-rate standard Ethernet connections, including chip-to-optical module, chip-to-chip, and backplane applications. The package MAC and physical coding sub-layer plus physical media attachment (PCS+PMA) sublayer IP cores are IEEE 802.3ba-2010 standard compliant.

The package targets Altera’s 28-nm Stratix V FPGAs and 40-nm Stratix IV FPGAs with transceivers operating at data rates up to 28.05 Gbits/s and 14.1 Gbits/s, respectively, and and Stratix IV GT transceivers operating at data rates up to 11.3 Gbits/s. The cores are available for download and free evaluation. (Price not given – available now.)

by Jim Harrison

Altera , San Jose , CA
Sales Office 408-544-7900
www.altera.com