Graphic Display Technology Drives New Vehicle Navigation Systems
Graphic Display Technology Drives New Vehicle Navigation Systems
By Dan Landeck, Fujitsu Microelectronics America
Auto navigation systems are migrating from high-end vehicles to mid-range and low priced cars and trucks, and becoming one of the important differentiators in the automotive product line at major manufacturers. As the technology proliferates, and infotainment emerges as a major new application, the graphics chips at the heart of the systems become more sophisticated.
Dan Landeck, Fujitsu Microelectronics America
By Dan Landeck, Fujitsu Microelectronics America
Auto navigation systems are migrating from high-end vehicles to mid-range and low priced cars and trucks, and becoming one of the important differentiators in the automotive product line at major manufacturers. As the technology proliferates, and infotainment emerges as a major new application, the graphics chips at the heart of the systems become more sophisticated, and they’ve been improving rapidly over the past two or three years to meet the industry’s application objectives. The job of the graphics display controller (GDC) is to provide a simplified method for displaying both prerendered and real-time images on screens from 8 to 12 inches wide while maintaining a power budget under 2 watts for three-dimensional and less a watt for two-dimensional rendering. These are not trivial processing tasks, but the steady, dependable evolution of the controllers is pretty impressive.
Back a few years ago, we started out with some basic GDCs with frame buffer memory and a display controller that polygon drawing, with an overlay capability for two or three layers. Those basic devices served some three-dimensional and two-dimensional navigation systems early on, but now the industry’s moving to make navigation and infotainment standard throughout their auto lineups. That means the OEMs and automakers are looking for ideal cost-performance ratios, and, when and where possible, the lowest possible bill of materials cost.
So the ‘mainstream’ GDC has to provide both analog and digital RGB video output interfaces, and connect with either active or passive display panels. The ICs have to overlay several layers and support alpha blending – which combines two colors to create a transparent effect – along with anti-aliasing, a function that manipulates polygon borders and blends pixel colors to replace jagged edges with smooth lines. The chips also include drawing functions like shading and texture mapping; many now deliver clock speeds past 166 MHz and higher draw rates than earlier models, along with 2D/3D graphic engines. These engines can decode audio and video and resize it reasonably well, which was a step forward.
Now, this year, we’re seeing GDCs with video and audio multimedia support built right into the processor, along with high PCI bandwidth, dual display output, and video upscaling and downscaling, to enable display of a full-screen mode of multimedia pictures at high resolutions. Features such as fogging and lighting are adding depth and richness to the images so the controllers can move into rear seat entertainment in cars and SUVs, in addition to the nav units. Multiple layering, improved with every generation of GDC, makes it possible to display simultaneous multiple high-resolution pictures in different sizes in any part of the screen, not just the entire panel.
That’s the hardware, improving relentlessly year after year, much like CPUs for PCs. But none of these ICs, no matter how well integrated or feature-rich, will provide designers with optimal performance without lots of software support such as encoder/decoders, device drivers, databases and configurable human-machine interfaces are available now. Software performance increases annually, as with the controller hardware, which should be ‘software-agnostic,’ or not tied to a specific real-time operating system or middleware, but instead capable of working with almost any of them.
One more consideration for using the latest GDCs is graphics memory use. Complex memory traffic patterns across the different interfaces can create bottlenecks that can be reduced or eliminated by developing dedicated or shared architectures. The best solution is a balanced design approach that reduces the bottlenecks while optimizing system performance, cost, and board space utilization. A memory architecture I’d suggest is an SoC combining the host CPU and the GDC into one chip with a high-speed data channel built into it. This will make certain the bandwidth needs are met without sacrificing controller performance.
Because these GDCs and their associated software are moving down the cost curve awhile adding features and capabilities, you’ll see more and more cars and SUVs with navigation systems and rear seat entertainment. These systems caught on first in Japan, and then in Europe. But now the U.S. manufacturers and bringing them on and the applications are growing. Keep watching.
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Dan Landeck is manager of Graphics Display Control products, at Fujitsu Microelectronics America.