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High Performance Clock Generation Devices

IDT has expanded its industry-leading portfolio of Programmable Clocks to offer the highest performance clock generation devices in the industry. The entire programmable clock family uniquely addresses the needs of both developers and the supply chain by providing high performance, Design For Test (DFT)-friendly solutions that can be configured and re-configured at any point in the manufacturing process or end product life cycle. Engineers benefit from the three high resolution PLLs, broad feature set and in-system test support. Supply chain managers enjoy a marked reduction in inventory management complexity and cost as well as the potential to extend product life cycles through the non-volatile programming capability.


IDT has expanded its industry-leading portfolio of Programmable Clocks to offer the highest performance clock generation devices in the industry. The entire programmable clock family uniquely addresses the needs of both developers and the supply chain by providing high performance, Design For Test (DFT)-friendly solutions that can be configured and re-configured at any point in the manufacturing process or end product life cycle. Engineers benefit from the three high resolution PLLs, broad feature set and in-system test support. Supply chain managers enjoy a marked reduction in inventory management complexity and cost as well as the potential to extend product life cycles through the non-volatile programming capability.

Key Benefits
Features
Benefits
Complete family includes clock generation, programmable skew and zero delay buffer devices

Enables 'One stop shop' for versatile clock network designs

'In system' programmable with integrated EEPROM

Allows device register settings to be saved, restored and/or reprogrammed in non-volatile memory. This allows:

  • Reduced procurement costs and simplified logistics
  • Increased design portability and lifespan
  • Remote maintenance, modification and testing
IEEE 1149.1 compliant JTAG boundary scan and programming via a single TAP ( Test Access Port )
Simplifies system and board level DFT (Design For Test) by allowing equipment to perform both boundary scan testing and programming. Eliminates the need for test clock insertion via external equipment or dedicated boundary scan clock control.
Three independent PLLs with high resolution prescalers, multipliers and output dividers
Delivers unmatched flexibility in clock scaling ratios to support nearly any combination of output frequencies from a single input frequency

Advanced I/O support:
Input: Universal inputsupports any differential or single ended logic type
Output: 3.3V LVTTL, LVPECL, LVDS

Provides I/O translation and enables applications which require various types of output logic
Supports clocks up to 500MHz
Supplies versatile capability for a range of applications with max frequency capability exceeding competing devices
High performance PLL design with programmable loop filter minimizes jitter and skew
Meets demanding requirements of many communications, storage, consumer and industrial applications
Spread spectrum modulators with programmable spread characteristics including frequency and ratio Gives designers another tool to minimize EMI and pass stringent regulatory requirements
Dual input references with glitchless switchover Supports clock redundancy for high availability applications
Supports both crystal and driven input references with programmable crystal oscillator characteristics
Provides flexible input reference support for crystals, crystal oscillators or driven clocks
 
Functional Description
The IDT Programmable Clock family includes devices for clock generation and distribution that integrate an EEPROM for non-volatile storage and loading of device settings. The devices offer non-volatile programmability of multiply and divide ratios, spread spectrum generation, PLL characteristics, IO types, output slew rate and drive strength. The performance and feature combination of the family leads the industry.

IDT is a leader in programmable timing devices that support in-system programming and test capabilities. Each device integrates an EEPROM providing non-volatile programming capability – the user can save, restore and/or reprogram all of the device register settings. The device registers are accessible via an I2 C or JTAG interface. This enables configuration and reconfiguration at any stage of the procurement, design and manufacturing process, which in turn, reduces procurement and engineering costs.

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