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High performance dual D-Type flip-flop

NXP- High performance dual d-type flip flop
The 74AUP2G79 is a dual positive-edge triggered D-type flip-flop with superior performance. The inputs accepts voltages up to 3.6 V with a very low static power consumption of 0.9 μA (maximum). The device operates by transferring the information on the data input (nD) to the nQ output on the LOW-to-HIGH transition of the clock pulse (nCP).

Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCCrange from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing a damaging backflow current through the device when it is powered down.

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