How to select output filter capacitors in high-efficiency, pulse-skipping mode

Pulse-skipping mode (PSM) is widely used as a method for improving the efficiency at light load. For this example, we will use the TPS65290 which has adopted PSM. A simplified block diagram and an output waveform of TPS65290 in PSM are shown in figure 1 and 2, respectively.

In PSM, only the SKIP_COMPARATOR engaged in the feedback loop shown in the figure 1. If the output voltage hit the low limit (Vout_pwm in the figure 2), the buck converter turns on and charging the output capacitor up to high limit (Vout_pwm+Vhys in the figure 2). If the output reaches to the high limit, the converter starts to sleep until the output voltage collapses to the low limit by the discharging due to the light load.

As the converter sleeps during this discharging period, the efficiency can be improved over a normal pulse-width modulation (PWM) operation. As the discharging period becomes longer, in other words with a lighter load, the efficiency advantage of PSM over PWM becomes more significant.

However, the operation of PSM can be away from the ideal waveform and the efficiency can be lowered with improper selection of output capacitors.

I had one customer with a problem of having lower efficiency than expected at their system board. The customer wished to achieve extraordinary reliability, so they had a limit on the maximum amount of ceramic capacitance. In order to reach their desired reliability, the customer needed a tantal capacitor to fulfill the remaining capacitance. As a result, they incorporated a large tantal capacitor with high equivalent series resistance (ESR) used in parallel with a small ceramic capacitor with low ESR in the system board. This is demonstrated in figure 3.

If the tantal capacitance is much larger than the ceramic capacitance, the PSM output waveform will becomes as figure 4.

The red and blue lines represent the output voltage and the voltage across the pure capacitor portion of the tantal capacitor, respectively. The large ESR and large capacitance of the tantal capacitor means slower response than the ceramic capacitor. Therefore, in the charging period the output voltage reaches the high limit by charging the ceramic capacitor quickly. But, during this charging period, the pure capacitor portion of the tantal capacitor is not charged to that level.

If the DC-DC converter starts to sleep, the charge stored at the ceramic capacitor moves to the tantal capacitor as well as the load. Therefore the output voltage drops rapidly due to this charge transfer from the ceramic capacitor to the tantal capacitor, and it results in reducing of the discharging period. As the discharging period is reduced the efficiency advantage of the PSM operation is also reduced.

To achieve the high efficiency in PSM as expected, the capacitance of a high-ESR capacitor should be fairly lower than the low-ESR ceramic capacitor.

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