JIAWG development platform is i960-based
The PI960MX-JXV, Joint Integrated Avionics Working Group (JIAWG)
Execution Vehicle is an off-the-shelf development platform for Intel's
i960 MM and MX microprocessor. The board combines the ISA and PI Bus
backplane protocol and the DOD's MIL-STD-1553B serial communication
protocol. The JIAWG has selected all these standards for use on the Air
Force's F-22 Advanced Tactical Fighter and the Army's RAH-66 Comanche
Helicopter. The 25-MHz board has 2 Mbytes of 64-bit-wide, zero-wait-state
SRAM on the backside bus and 1 Mbyte of 32-bit-wide, zero-wait-state SRAM
on the local bus. Both are expandable to 4 Mbytes. Also on the board is an
optional Ethernet interface, an RS-232 port, an 82C54 programmable
timer/counter, and up to 1 Mbyte of flash EPROM. A flash-EPROM-resident
monitor and built-in diagnostic routines enhance the software debug and
diagnostic capabilities. ($18,900–stock to 6 weeks.) Tronix Product
Development Corp. Phoenix, AZ Tracy Markie 602-233-1011
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