LATTICE ANNOUNCES LatticeECP2M FPGA SOLUTION FOR PCI EXPRESS V1.1

LATTICE ANNOUNCES LatticeECP2M FPGA SOLUTION FOR PCI EXPRESS V1.1

Lattice Semiconductor announced the expansion of its PCI Express Intellectual Property (IP) core family within its ispLeverCORE™ portfolio. Lattice is adding a new PCI Express x4 IP core solution, optimized for the LatticeECP2M™ low-cost FPGA family. Like the previous PCI Express x1 IP core for LatticeECP2M devices, the x4 version implements a single-chip PCI Express endpoint solution with integrated SERDES that is ideal for high-volume, low-cost and limited form-factor applications.

LatticeECP2M PCI Express Core Successfully Tested Against PCI Express Version 1.1 Specifications; Solution Enables Single-Chip, Programmable PCI Express Endpoints

The new LatticeECP2M PCI Express x4 IP core and evaluation board both successfully passed testing against the PCI Express version 1.1 specifications at the February 2007 PCI-SIG workshop, ensuring that Lattice's solution is interoperable with existing PCI Express-supported systems. The IP core will be supported by the IPexpress™ flow within Lattice's ispLEVER® 6.1 Service Pack 2, or later, design tool suite.