Low-cost FPGA family cuts power consumption

ICs feature 5 to 120 k LEs at 20% less cost

Described as the industry’s first low-cost FPGAs built with 65-nm process technology, the Cyclone III family of eight devices are said to consume only one-third the power of competing devices. The chips range from 5 k to 120 k logic elements (LEs) and feature 20% lower cost per logic element than the previous generation,

The largest (120 k LE) device requires just 0.5 W of static power. The ICs also feature up to 288 18 x 18 DSP multipliers, up to 4 Mbits of memorythree times that of the previous versionand LVDS I/Os that run at up to 875 Mbits/s. The smallest version, with 5 k LEs, has 400 Kbits of memory and 23 multipliers, along with two PLLs and 10 global clocks. ($4 ea/500,000, EP3C5E 5 k LEprod qty, August.)

Altera , San Jose , CA
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http://www.altera.com