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Low density FPGA has fast I/O, low power

The MachX03 ultra-low density MachXO3 field programmable gate array (FPGA) family is said to be the world's smallest, lowest-cost-per I/O programmable platform. The 640 to 22K instant-on, non-volatile programmable logic-cell FPGA family features tiny 2.5 x 2.5 mm wafer-level chip-scale packaging and 540 I/O count devices, as well as devices with 3.125 Gbit/s SERDES capabilities.

ICDJH_Lattice_Nov2013

The device has µW static and mW active power, while supporting up to 150 MHz operation and includes DSP and memory resources. It provides affordable implementations of connectivity interfaces such as MIPI, and has hard PCIe, and GbE IP. First production shipments are scheduled for the end of 2013 and pricing starting below $1.00 each in high volume.

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