Low-power CPLDs have 40 to 2,210 LEs

The low-power MAX V CPLD family has from 40 to 2,210 logic elements and features static power as low as 45 µW. The devices use a single 1.8-V supply and have startup configuration times of 50 μs or less.

The devices provide emulated RSDS outputs with 300-Mbit/s data rates and LVDS outputs with data rates up to 400 Mbits/s. They have 8 Kbits of flash memory, JTAG BST circuitry, and support for I/O at 3.3, 2.5, 1.8, 1.5, and 1.2 V. (5M80ZE64C5N 80-LE device, $1.70 ea/100 — some versions available now.)

Altera , San Jose , CA
Sales Office 408-544-7900
www.altera.com