Lowest-jitter clock enables broadcast video apps

Lowest-jitter clock enables broadcast video apps

Replacing traditional multicomponent video PLL solutions with a single IC, the Si5324 clock IC delivers a jitter performance of 5 ps peak-to-peak claimed 80% lower than competing parts. The part can generate virtually any output frequency from 2 kHz to 1.4 GHz from any input frequency ranging from 2 kHz to 710 MHz, simplifying synchronization in next-generation multirate video equipment.

Based on the company’s DSPLL technology, the Si5324 has a fully integrated, digitally programmable loop filter that supports loop bandwidths ranging from 4 to 525 Hz as well as a low-phase-noise internal VCO. Housed in a 36-lead QFN package, the IC incorporates all PLL components into a single highly integrated device, eliminating the need for multiple PLL ICs, external filters, and VCXO components. In addition, the device meets emerging video standards including 3G-SDI (SMPTE 424M). ($17.95 to $57.20 ea/1,000, depending on selected output clock frequency range (A/B/C/D speed grade) available now.)

Silicon Laboratories , Austin , TX
Sales 512-416-8500
http://www.silabs.com