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MCU IP targets high-performance embedded

The APS5 32-bit processor IP features high performance and high throughput and can be ordered in dual- or quad-core versions. The IP has a 5 to 7-stage integer pipeline and out-of-order completion ensuring that most integer instructions (load and stores included) are executed in a single cycle.

MCU IP targets high-performance embedded

The APS5 IP can run at 400 MHz in a 90-nm technology and a single APS5 core offers 1.93 CoreMarks/MHz. The APS tool-chain and IDE (for C/C++) is available to licensees free of charge. Ports to RTOSs such as FreeRTOS, Micrium μC/OS, and μCLinux are also available. (No price given — available now.)

By Jim Harrison

Cortus , Montpellier , France
Sales +33 4.30.96.70.00

www.cortus.com

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