Medical applications look towards FPGA-based high-performance computing
By Mike Strickland, Altera Corp.
Imagine if someone who’s ill could receive a DNA analysis followed by customized treatment, moments after providing a blood sample. Or, consider the advantages of 3-dimensional imaging and the new formats offered that have enabled more mobile versions of computer tomography (CT) backprojection equipment. These are just two examples demonstrating what the future might look like thanks to the power of high performance computing.
Mike Strickland, Altera Corp.
By Mike Strickland, Altera Corp.
Imagine if someone who’s ill could receive a DNA analysis followed by customized treatment, moments after providing a blood sample. Or, consider the advantages of 3-dimensional imaging and the new formats offered that have enabled more mobile versions of computer tomography (CT) backprojection equipment. These are just two examples demonstrating what the future might look like thanks to the power of high performance computing.
Whether an organization is in the business of analyzing medical data, processing real-time stock trades, or performing geophysical modeling, high performance computing has become a critical resource. With speeds measured in Giga FLOPS (floating point operations per second), supercomputers, computer clusters, and other types of high performance systems make fast work of crunching through data-intensive applications.
Traditional microprocessor-only system architectures have a difficult time keeping pace with high performance computing applications. With high performance compute needs growing exponentially; traditional microprocessors remain limited by Moore’s Law and are unable to keep up with application demands while also burning through a lot of power. Now, however, there’s a way to achieve performance gains while overcoming the power limitations—by offloading processing functions from the microprocessor to a plug-compatible FPGA. FPGAs are ideal coprocessors, generating as much as a 100X performance gain, up to 90% lower power consumption, and better overall server resource utilization in many types of applications and algorithms.
Utilizing commercially-available software tools and hardware devices, higher-performance coprocessing systems are being created quickly and cost-effectively with FPGAs. Engineers designing with high-level C programming languages are building new, faster-running algorithms. An example if the FDK [Feldkamp, Davis, Kress] algorithm for CB-FBP (cone-beam filtered backprojection) used in CT for the medical market, that enables applications to take advantage of the power of FPGA reprogrammability.
Orders of magnitude application performance improvement
At the application level, FPGA coprocessing is typically generating acceleration improvements in the 3X to 50X range. At the algorithm level, acceleration is reaching 100X improvement. There are, of course, variations by vertical industry. For example, a CT backprojection algorithm running on a high performance Altera Stratix III FPGA with approximately three million gates can easily scale a computational system up to handle 64 or even 128-slice CT systems. This approach achieves as much as a 578x performance gain when used in conjunction with a SRC Computers-7 Series H Map reconfigurable processor relative to a processor only approach (2.8-GHz processor).
Performance improvements aside, high performance computing users are also realizing some important peripheral benefits. By making better use of server resources and lowering power consumption, less is being spent on cooling costs and the same server farm footprint can be maintained for vastly greater computing results.
Thanks to the availability of new design tools, engineers no longer need to know a hardware design language (HDL) such as Verilog or VHDL. Instead, today’s tools take in C code and deliver the low-level FPGA programming file. These new tools create the design in HDL automatically from a higher-level software representation, optimizing the design for the targeted hardware. As a result, users can create custom hardware in minutes, essentially using a push-button approach.
Figure 1. Typical C-to-FPGA Design Flow
Since FPGAs can be programmed at any stage in the design cycle—including in the field—they give systems engineers a great deal of flexibility. They can easily and readily accommodate changes in system specifications, algorithms, or industry requirements. In comparison, ASICs are limited to providing only the function for which they were originally made.
The high performance compute market is increasingly moving away from custom hardware and software to more “vanilla” servers, clustering these systems to achieve the performance provided by custom solutions. This move does lower acquisition costs, but these lower cost systems also use a tremendous amount of power (operational and cooling) and results in a performance wall that processors alone simply can’t break through. This represents another FPGA coprocessing opportunity, since FPGAs deliver the performance required with lower power consumption—all at a fraction of the cost of custom solutions.
Faster results, faster action
FPGA coprocessors achieve these vast performance gains because they parallelize and pipeline the application in the FPGA fabric, while taking advantage of FPGA logic density and bountiful memory. Pipelining allows multiple instructions simultaneously, delivering one calculation per clock throughput. Parallelizing provides thousands of computational resources, and increases memory throughput to avoid bottlenecks. What this means is that FPGAs work well with random access to memory, which is how most high performance applications are designed. Standard microprocessors, on the other hand, work better when memory is accessed in a predictable manner.
While memory access is an obstacle for the processor, it is strength for the FPGA. When a high performance computing application is written to function in the FPGA fabric, the application can be closely associated with the memory in the FPGA. With this pipelining approach, the internal, application-based memory in the FPGA acts as the primary cache for the application, which speeds up the application.
Figure 2. High Performance Computing Applications
Coprocessing upgrade supports future demands
For more accurate results, many high performance computing applications use floating point data types, which allow users to easily store and manipulate numbers with fractional parts and a large range of sizes. In coprocessing applications, the optimal FPGA device offers a balanced mix of multipliers and adders in the fabric that is ideal for matrix math and floating point applications.
The hunger for super-fast information analysis continues to grow. For high performance computing, FPGA coprocessing represents a practical way to substantially enhance performance levels while reducing power consumption and associated costs. FPGAs can be designed to operate at as little as 40-50% of the power that can provide a 20-30% reduction in Fmax (critical register-to-register) performance and with all of the other development tools, FPGAs are an ideal solution for a wide variety of medical imaging applications including CT backprojection.
Mike Strickland is the director for strategic and technical marketing for the Applications Business Unit of Altera Corp. He has more than twenty years of computer, networking and storage experience with companies such as HP, Silverback Systems, Texas Instruments, and Altera. His current responsibilities with Altera include driving the strategic and technical marketing efforts for the computer, storage, test and medical market segments, as well as leading the FPGA High Performance Computing vision. Previously Strickland has led the development and launch of numerous products including networking, storage management, TCP/IP Offload and iSCSI. He holds a B.S. degree in electrical engineering from Brown University and a M.S. degree in management from the Sloan School of Management at M.I.T.
For details on the company's solutions for the medical market, click here: Altera's offerings.