MegaChips Corporation announced a new 16nm FinFET analog ASIC with integrated Gigabit-class data converters designed to meet the cost and performance demands of 5G networks and other high-volume applications. This new analog ASIC breaks through the cost barriers for high-speed applications by integrating 6.8Gsps data converters into an advanced SOC. With this integration, system designers now have a clear path for bringing FPGA-based prototypes from the R&D lab to high-volume commercial markets.
Millions of millimeter-wave small cells are needed to address the 5G network challenge. System designers at the world’s leading manufacturers are currently working on prototype solutions for this problem based on FPGAs or discrete data converters. Yet, these designs are too expensive to be commercially viable for high-volume deployments.
MegaChips’ new analog ASIC represents a major breakthrough in CMOS scaling and analog integration for high-speed designs. It provides a complete analog front-end—with a 14-bit, 3.4Gsps/6.8Gsps ADC and 12-bit, 3.4Gsps/6.8Gsps DAC—in a 16nm SoC that saves power, cost and space.
Designed for performance, the company’s Analog Mega Block (AMB) IP includes high-speed ADCs, DACs, PGAs, IAMPs, PLLs, and filters in a single silicon chip. It is available in both discrete AFE and ASIC SoC solutions. With over 50-million chipsets shipped in the last decade, MegaChips’ technology is found at the heart of many of the world’s leading high-speed communications products.
“Achieving compliance with today’s communications standards is a long and complicated process,” said Masahiro Konishi, general manager of MegaChips. “We have a dedicated team of experts focused on AMB development. They work alongside our customers as a virtual R&D team, from the initial design specification through certification and production ramp up. This can take several years, and our team is there the whole way to ensure the success of our partners.”
“MegaChips has a long track record of successfully delivering state-of-the-art high-speed ASICs for passive optical networks (PON), home networks (HPNA, G.hn), and access networks (G.fast),” commented Yuji Sakuma, general manager of MegaChips. “This 16nm FFC analog ASIC gives us another competitive ASIC solution for the coming decade.”
“Sigma Designs is a leader in the Home Network market, with products in millions of homes around the world,” said Nadav Katsir, vice president Home Connectivity Unit of Sigma Designs. “Our partnership with MegaChips has been a key part of that success.”
“MegaChips has world-class analog IP, along with the know-how and expertise to help its customers get to market,” commented David Baum, CEO of Sckipio. “For an innovation-driven company like ours, there’s no other ASIC partner we’d rather work with.”
MegaChips previously added a 28nm AMB with 0.6Gsps/1.2Gsps, 14-bit ADC and DAC and a 65nm/130nm AMB with 200Msps/400Msps 12-bit ADC and DAC to its analog ASIC IP family.
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