Memory controller IP delivers fast NAND error correction

Memory controller IP delivers fast NAND error correction

Method yields 6x speed improvement and high accuracy correction

Databahn memory controller IP is said to be the world’s fastest NAND flash-based system delivering a 6x performance improvement over other methods. The solution addresses key issues associated with single-level cell and multi-level cell NAND, provides significant advantages for system boot applications, plus provides a reduced BOM cost.

The new method provides an innovative layer built on top of a Bose, Ray-Chaudhuri, Hocquenghem (BCH) algorithm used to correct multiple random error patterns.

The IP is well suited to applications that want to use high-density NAND memory for booting along with code storage. It also provides compiler options that allow for maximum flexibility such as bit widths, chip selects, buffering, etc., and supports several power down options. (Contact manufacture for price—available now.)

Denali Software , Palo Alto , CA
Sales 650-461-7200

http://www.denali.com