Mux & demux chips operate at 32 Gbits/s
The HMC954LC4B 2:1 multiplexer and HMC955LC4B 1:2 demultiplexer support up to 32 Gbit/s data serialization and deserialization, and are data rate and protocol agnostic. The HMC954LC4B time interleaves two differential input data lanes up to 16 Gbits/s, into a single output data lane at up to 32 Gbits/s. The HMC955LC4B deserializes a single input data lane into two output data lanes.
The devices operate from a 3.3 V supply with only 0.2 ps RMS jitter and 3 ps p-p of deterministic jitter. Power dissipation is less than 500 mW. The 4 x 4 mm SMT packaged ICs have 19 ps rise and fall times. Their programmable output voltage swing and DC coupling enable simple interfacing with FPGA devices in ATE applications. ($166 ea/100 — samples available now.)
by Jim Harrison
Hittite Microwave , Chelmsford , MA
Sales 978-250-3343
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