New Cypress 4-PLL Timing Chip Is First With 2-Wire I2C Interface, Allowing On-Board Programming For Fast Time-to-Market And Reduced Inventory

New Cypress 4-PLL Timing Chip Is First With 2-Wire I2C Interface, Allowing On-Board Programming For Fast Time-to-Market And Reduced Inventory

Cypress Semiconductor Corp. introduced the industry's first 4-PLL (phase-locked loop) timing device with a 2-wire I2C programming interface. The I2C programming allows manufacturers to reduce time-to-market by programming frequencies on the printed circuit board instead of having to order factory-programmed parts or use an additional manufacturing step. It also allows customers to order one part number and use it for multiple products and design iterations, reducing inventory requirements. The CY24488 replaces multiple crystals, reducing BOM (bill of materials) cost.

Delivers High Performance Clocking for Digital Entertainment Devices and Other Applications Requiring Multiple Frequencies

The new CY24488 meets critical timing requirements in digital set-top boxes, DVD recorders, digital TVs and other complex systems requiring synthesis of multiple, unrelated frequencies. It provides three independent frequencies and one buffered reference frequency. The programmable output frequencies range from 4.9152 to 148.5 MHz, compatible with most digital entertainment devices.

The device has an integrated analog voltage controlled crystal oscillator (VCXO) with a minimum pull range of ± 120 ppm for maximum frequency resolution and better frequency tracking. It also includes programmable output drive strength for EMI control and a 2.5-V option to interface with lower voltage ICs without extra circuitry.