BY EMIR SERDAREVIC,
Staff Design Engineer,
ams,
www.ams.com
Great advances have been made in recent years in the design of DC/DC converter circuits by increasing their switching frequency. This has led to improved performance — more accurate regulation and faster response to transients — and to reductions in the space occupied by converters.
But two fundamental trade-offs have continued to dog converter designs when it comes to power efficiency: Reducing the size of the power switch tends to reduce its efficiency, and reducing the power to the feedback elements tends to reduce their performance.
Now new approaches to the fabrication of converter power switches and to the operation of feedback circuits have succeeded in overcoming previous limitations in the efficiency of DC/DC converters. This article describes them and outlines their impact for designers of low-power and battery-powered devices.
Basic operation of a dc/dc converter
While DC/DC buck or boost converter manufacturers have adopted many different topologies to optimize devices for size, speed, efficiency, or cost, all have fundamentally the same basic elements: An input voltage is converted to an output voltage through the operation of two switches (see Fig. 1 ). A controller monitors the output voltage and, using this feedback, it determines the pulse width required to produce the desired output voltage.
Fig. 1: With S1 closed and S2 open, inductor L1 is charged; with S1 open and S2 closed, L1 is discharged.
Several elements in such a DC/DC converter contribute to power losses:
- non-ideal external components, such as coils and capacitors
- non-ideal switches, which cause switching losses as current flows through them. These losses are dominant in continuous operation (high-load conditions).
- internal control blocks, which consume power. These might include a zero-crossing detector, a current sensor, and a reference voltage. These losses are dominant in light-load conditions.
Fundamental limitations of power converter design
There is a simple way to reduce the switching losses suffered during continuous operation: Increase the size of the switches. But this is undesirable in space-constrained applications. Increasing the die area also increases the cost of an IC. There is, therefore, a need to keep a balance between making the switches large enough to tolerate the peak load and efficient enough, while accommodating them in the board design and in the bill-of-materials budget.
The dominant energy losses at light loads can be limited by reducing the power supplied to the internal control blocks, but only at the cost of losing speed and precision. Also, functions such as zero-crossing detection and current sensing have to work to a high standard of performance or the entire operation of the converter might be compromised.
New fabrication techniques for superior current handling
The basic nature of the trade-offs described above is determined by the laws of physics. This means, for instance, that a larger switch made with a given fabrication process will lose less energy in switching operations than a smaller switch fabricated with the same process.
An improved process, however, can produce a more efficient small switch, and this is how converter manufacturers are now seeking to lessen the impact of the fundamental trade-off.
In the latest generation of power switches from ams, for instance, a MOSFET is realized with a waffle structure implemented in standard CMOS silicon. This waffle structure is characterized by its very low resistance and by the large number of contacts for each current-carrying path. The effect of both characteristics is to reduce switching losses.
The AS3729B MOSFET benefits from this new waffle structure. It is intended for use in the power circuit driving the large applications processors found in battery-powered devices, such as tablets and smartphones. Capable of supporting 8-A peak loads and offering peak efficiency of more than 90%, it is no bigger than 1.615 x 1.615 mm in a WLP package.
The device features two channels, with a peak load per channel of 4 A (see Fig. 2 ). Each switch terminal is symmetrically connected to two bumps on the package. This means that the peak current flowing through any single bump is 2 A. This relatively low current-per-terminal helps to keep switching losses to a level below that normally expected in a MOSFET that switches 8-A loads.
Fig. 2: The AS3729B power stage has a symmetrical two-channel structure.
Intermittent operation of feedback loop
If the means to reduce power losses in the switches is to reduce the resistance of the internal structure, the most effective way to reduce losses in the feedback loop would be to turn it off. Of course, the feedback loop is a fundamental component of the converter system, so it cannot be turned off completely.
The trick, then, is to design the converter in such a way that internal blocks can be shut down when not needed, but turned on and made ready extremely fast when required.
In fact, this mode of operation provides for high current to be supplied to these blocks — so that they can operate at peak performance — in the short period for which they are needed: The average power loss can still be low, because energy consumed = power*time. This approach has turned out to be far more successful than attempts to reduce the current supplied to the control blocks in normal operation.
This partial shut-down mode of operation can be illustrated by reference to the basic buck converter shown in Fig. 1 . Switches S1 and S2 charge and discharge coil L1. The boost conversion process has two states:
- With S1 closed and S2 open, current flows into the coil (because Vin > Vout ) and energy is stored in the coil.
- With S1 open and S2 closed, the energy stored in the coil is discharged and the current flowing into the coil falls (because Vout > 0 V).
When S1 is closed and the coil current is rising, the converter must sense the current in order to be ready to open the switch after the current limit is reached. If the switch is opened too early, the device cannot support its rated maximum load; if the switch is opened too late, the coil could be damaged. This means that the current sensing block must work very accurately under all conditions.
When S2 is closed and the coil current falls, accurate zero-crossing detection prevents a negative current from flowing, which would impair the system’s efficiency. At the same time, the switching point should come as close to 0 A as possible to minimize switching losses and noise. So zero-crossing detection must also be extremely accurate and, again, under all conditions.
To further complicate matters, it is impossible to trim tiny, high-efficiency power stages, so the design of the power circuit must allow for process variation and mismatching between one unit and another.
With this requirement for high-accuracy current sensing and zero-crossing detection, and no potential for trimming, how can elements of the feedback system be turned off?
In fact, the real challenge is the speed with which the coil current rises and falls. According to the formula U = L*di/dt, the speed of change in the coil current is proportional to the voltage of the coil and indirectly proportional to the coil’s value: di/dt = U/L.
The voltage U is typically up to approximately 5 V; and the trend in converter designs is for the coil’s value to become smaller and smaller. The latest converters use coils of 1 µH or even 0.5 µH. Applying U = 2 V and L = 0.5 µH to the formula, di/dt = 2 V/0.5 µH = a rate of change in the coil current of 4 A/µs.
This is extremely fast: the current changes by 4 mA every nanosecond ! Therefore, extremely rapid current detection and response are required. This in turn calls for a supply current to these feedback blocks of no less than a few mA: Reducing the supply to these blocks too far would degrade their performance unacceptably.
It is better, then, to turn these blocks off entirely when they are not required and give them all of the current they need when they are required. But this means that they must be able to start up quickly. With reference to Fig. 1, the current sensing block may be turned on and off when S1 is turned on and off; the zero-crossing detection block may be turned on and off when S2 is turned on and off.
In the AS3729B, this is implemented through current mirroring and other techniques that make the feedback blocks available for operation in
New techniques achieve efficiency close to 90%
For the power-system designer, the most important characteristic of a DC/DC converter is not its internal design: it is (normally) its efficiency. High efficiency helps prolong a battery-powered device’s period of operation between charges and also helps to avoid the excessive generation of waste heat. In today’s battery-powered devices, designers typically specify minimum efficiency across the whole operating range of 80% and peak efficiency of about 90%.
In the case of the AS3729B, reducing the two dominant sources of losses has helped to achieve very high levels of efficiency. As Fig. 3 shows, efficiency across most of the operating range is typically close to 90%.
This shows that fabrication breakthroughs and improvements in control-loop operation can lessen the impact of the trade-off between converter size and efficiency; a tiny device such as this can now handle large currents highly efficiently.
Fig. 3: Efficiency plotted against output current in systems using various TDK coils.
Author Biography
Emir Serdarevic has been a Staff Design Engineer and Project Manager at ams since 2004, responsible for developing standard linear products, mostly in the field of power management.
Emir has a degree in electrical engineering from the Technical University of Graz in Austria.
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