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Package provides full-chip ESD analysis

The PathFinder IC physical integrity software package provides a full-chip electrostatic discharge (ESD) analysis. It provides innovative modeling, extraction, and simulation functions for ESD verification for early prototyping, circuit optimization, and full-chip signoff.

The tool provides native handling of clamp cell snap-back characteristic for dynamic Spice-like simulation, built-in extraction and handling of power/ground RLC, substrate RC, and package parasitics, and layout based full-chip analysis of ESD events such as human body model (HBM), machine model (MM) and charged-device model (As an option to RedHawk and Totem platforms CDM). ($180,000 — available now.)

Apache Design Solutions , Mountain View , CA
Sales 650-641-4200

http://www.apache-da.com

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Learn more about Apache Design, A Subsidiary of ANSYS

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