PCIe Gen 5 timing chips deliver power advantage for data centers

By Carolyn Mathas, contributing writer

Silicon Labs claims the industry’s first comprehensive and compliant portfolio of timing solutions that delivers best-in-class jitter performance for the PCI Express (PCIe) 5.0 specification. The new portfolio includes the Si5332  any-frequency clock family, the Si522xx  PCIe clock generators, and the Si532xx  PCIe buffers.

Powered from 1.5-V to 1.8-V supply rails, the Si522xx and Si532xx devices are the industry’s lowest-power PCIe clocks and buffers. The Si522xx and Si532xx output drivers with Silicon Labs’ push-pull high-speed current steering logic (HCSL) eliminates the need for and cost of external termination resistors, required by conventional PCIe clocks using constant-current output driver technology.

Data center designers implementing PCIe Gen 5 tap into increased interconnect speeds between the CPU and workload accelerators, including GPUs, FPGAs, and dedicated accelerator solutions, on the way to 400G Ethernet.

The Si5332 any-frequency clock family generates PCIe Gen 5 reference clocks with jitter performance of 140 fs RMS and optimizes PCIe SerDes performance. These clocks generate any combination of PCIe and general-purpose frequencies. The Si522xx PCIe clock generators and Si532xx PCIe buffers are capable of two, four, eight, or twelve PCIe Gen 1-/2-/3-/4-/5-compliant outputs for use in PCIe data center application endpoints.

Si5332 clocks generate any combination of PCIe and general-purpose frequencies, providing clock tree consolidation for diverse applications.

Features include full compliance with PCIe Gen 5 Common Clock, Separate Reference No Spread (SRNS), and Separate Reference Independent Spread (SRIS) architectures. The devices do not require discrete power supply filtering components for easier PCB layout without board-level noise to degrade clock jitter performance. The devices are drop-in−compatible with PCIe Gen 1/2/3/4 designs for a seamless migration.

The Silicon Labs PCI Express clock jitter tool is updated to include the filters to accurately measure PCIe Gen 5 reference clock jitter. The utility is free and can be found at silabs.com/pcie-learningcenter .

Lead times for samples and production quantities of the Si5332 any-frequency clock and Si522xx PCIe clocks and Si532xx PCIe buffers are two weeks and four weeks, respectively. Si5332 pricing ranges from $4.25 for the six-output device to $4.90 for the 12-output device. Price ranges for the Si522xx are $1.27 for the two-output device to $2.76 for the 12-output device, and prices for the Si532xx range from $1.40 for the four-output device to $2.10 for the 12-output device, all in quantities of 10,000.

Three development kits and their respective costs include the Si5332 any-frequency clocks (Si5332-6EX-EVB at $149), Si522xx PCIe clocks (Si52204-EVB at $140), and Si532xx PCIe buffers (Si53208-EVB at $175).