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PowerQUICC communications MPU tops performance charts

PowerQUICC communications MPU tops performance charts

IC features four coprocessors and uses 45-nm SOI technology

The high-performance MPC8569E 32-bit PowerQUICC III communications processor is based on 45-nm silicon-on-insulator technology. The chip takes less than 10 W at a 1.33-GHz core clock speed and is said to offer twice the performance of previous versions. It features four QUICC Engine coprocessor blocks, which handle termination, interworking, and switching for a wide range of communication protocols such as Gigabit Ethernet, ATM, HDLC, POS, PPP, and PWE3.

PowerQUICC communications MPU tops performance charts

The device also includes a 512-Kbyte L2 cache for the CPU, one 64-bit or two 32-bit DDR2/DDR3 memory controllers, eight 10/100 Ethernet and four GbE ports, plus serial RapidIO, USB 2.0, and PCI Express interfaces. It targets wireless access infrastructure, server-switching cards, multiservice routers, and industrial networking applications.

The IC comes in a 783 FC-PBGA package and has optional encryption capabilities. (From $80 ea/10,000 — samples available now, prod qty 2010.)

Freescale Semiconductor , Austin , TX
Sales 800-521-6274
http://www.freescale.com

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