Programmable power manager integrates three PMIC functions

Programmable power manager integrates three PMIC functions

The ProcessorPM POWR605 is a programmable single-chip power manager that integrates the functions of separate power management ICs including reset generation, watchdog timer, and voltage supervision. The device is preprogrammed with an initial configuration to integrate a programmable six-supply reset generator, and a programmable watchdog timer. The original configuration software source code is also provided to enable integration of additional functions for further board cost reduction.

The power management device provides six programmable threshold comparators with 0.7% accuracy and individual glitch filters that monitor up to six supply rails without external resistors and capacitors. The comparator outputs are connected to a 16-macrocell on-chip PLD that generates the reset and brownout signals by using logic equations.

Four timers can be individually programmed from 32 µs to 2 s and used for implementing watchdog timers or for reset pulse stretching. Two digital inputs can be used for manual reset inputs or for monitoring other digital inputs such as power-down or disable-processor signals.

All device settings are stored using on-chip nonvolatile EEPROM that is programmed via a JTAG interface. Designs can be modified with the company’s free PAC-Designer software. ($0.75 ea/200,000 — samples available now.)

Lattice Semiconductor , Hillsboro , OR
Brian Kiernan 503-268-8739

http://www.latticesemi.com