Infineon Technologies AG has expanded its HYPERRAM pseudostatic DRAM (PSRAM) portfolio with the launch of the HYPERRAM 3.0. The new memory chip doubles the throughput to 800 MB/s, compared with the previous generation, thanks to a new 16-bit (previously 8-bit) extended version of the HyperBus interface.
Delivering high-bandwidth, low power, and low pin-count, the HYPERRAM 3.0 memory chip is suited for applications requiring expansion RAM memory, including video buffering, factory automation, artificial intelligence of things (AIoT) and automotive vehicle-to-everything (V2X), as well as applications requiring scratch-pad memory for intense mathematical calculations.
Infineon said the new HYPERRAM 3.0 memory solutions offer a much higher throughput-per-pin than existing technologies, including PSRAMs and SDR DRAMs
The HYPERRAM is described as a a stand-alone PSRAM-based volatile memory that offers a cost-optimized and lower complexity solution to add extension memory. “The data rates are equivalent to SDR DRAM but with much lower pin-count and lower power requirements,” said Infineon. “The increased per-pin data throughput of the HyperBus interface makes it possible to use microcontrollers (MCUs) with fewer pins and PCBs with fewer layers.”
A bit of HYPERRAM history
Infineon introduced the first generation of HYPERRAM devices with the HyperBus interface in 2017. This was followed by the second generation HYPERRAM 2.0 devices introduced in 2021, which support both the Octal xSPI and HyperBus JEDEC-compliant interfaces with data rates of up to 400 MB/s. Now the HYPERRAM 3.0 doubles the bandwidth to 800 MB/S.
The HYPERRAM devices are available in a density range of 64 Mb to 512 Mb. They are AEC-Q100 qualified and support industrial and automotive temperature grades up to 125°C. The HYPERRAM 3.0 products can be ordered now in a BGA-49 package.
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