Renesas Technology to Release Dual-core SoC with Built-in Image Recognition Processing Function for Automotive Applications

Renesas Technology to Release Dual-core SoC with Built-in Image Recognition Processing Function for Automotive Applications

Believed to the industry’s first dual-core SoC product to incorporate an image recognition processing function, the SH7776 (SH-Navi3) builds on the track record of its predecessors to deliver approximately 3.5 times faster processing through greater internal parallelism and a doubled bus width. It

The SH7776 (SH-Navi3) is a dual-core system-on-chip (SoC) device with enhanced on-chip graphics functions and a high-performance image recognition processing function for the next generation high-performance car information terminals. The device integrates two SH-4A high-performance 32-bit CPU cores on a single chip and achieves a superior processing performance of 1,920 million instructions per second (MIPS), when operating at 533 MHz. Renesas Technology has the top share¹  in the worldwide market for microprocessors for car navigation systems, and the SH-Navi Series, a single-chip SoC device implementing functions essential for high-performance car navigation systems such as 3-D graphics, is already used in many high-end products.

The 3-D graphics engine incorporates PowerVR SGX, a sophisticated 3-D graphics IP from the British company Imagination Technologies Limited (IMG). It enables polygon performance of approximately twice than PowerVR MBX used in the earlier SH-Navi1 and SH-Navi2 devices. This provides support not only for 3-D rendering in navigation applications, but also for multimedia applications such as Human Machine Interface (HMI) that demand more colorful and realistic 3-D rendering.

The SH7776 also incorporates a 2-D and 3-D graphics processor for detailed map rendering and more easy-to-use operation screens. Supported features include 2-D rendering functions such as bold-line rendering as well as 3-D rendering functions such as triangle 3-D rendering, for enhanced three-dimensionality, and texture mapping, for more realistic textures. They make it possible to realize a detailed and high-quality GUI incorporating maps, icons, and menus as well as colorfully rendered 3-D objects (such as high-rise buildings) in maps.

Believed to the industry’s first dual-core SoC product to incorporate an image recognition processing function, the SH7776 (SH-Navi3) builds on the track record of its predecessors to deliver approximately 3.5 times faster processing through greater internal parallelism and a doubled bus width. It can execute multiple external environment recognition programs simultaneously and in real time, for example lane detection and detection and tracking of preceding vehicles. This image recognition processing IP incorporated in SH7776 (SH-Navi3) was developed jointly with Hitachi, Ltd.

In addition, the distortion compensation module enables transformation into any shape of image data captured by a camera. For example, image data from a camera fitted with a fisheye lens could be used to generate a bird’s-eye view of the periphery of the vehicle.

The device incorporates a two-channel 16-bit dedicated bus interface operating at 533 MHz for connecting high-speed DDR3-SDRAM, enabling ultra-high-speed data transfer at a maximum of 4.27 gigabytes per second. Both channels of the dedicated bus can be accessed at the same time. In addition, the dedicated I/O of PCI Express interface allows high-speed transfer of data at a maximum of 250 megabytes per second to and from an external device equipped with a PCI Express interface.

An on-chip set of peripheral modules as required by car navigation systems, includes a serial ATA interface achieving high-speed connection to hard disks,sound interfaces including an audio encoder, a USB 2.0 Host/Function interface, a TS interface for receiving terrestrial digital TV broadcasts, and a GPS baseband processing module. This full and varied complement of peripheral functions makes it possible to reduce the total number of components and achieve a high-performance system at reduced cost.

The dual-core architecture supports two types of processing. Symmetric multiprocessing (SMP), in which the operations of a single program running under a single OS are divided between two CPU cores for parallel processing, is supported. Asymmetric multiprocessing (AMP), in which different OSes (or multiple instances of the same OS) and completely different programs run on each of the CPU cores, is supported.