RFID Reader block diagram from Texas Instruments

Design Considerations

The RFID (Radio Frequency Identification-13.56MHz RFID system) essentially consists of an RFID Reader/Writer (Transceiver), an HF Tag and a Processor unit interfacing to various peripherals.

HF Tags

A wide range of HF Tags are available. Physical form factor and processing requirements of the HF Tag are the primary factors that help decide which tag to use. In addition, the amount, type and security level of the information which needs to be stored on the card determine the appropriate tag. TI provides HF Tags, suitable for paper and plastic lamination. Memory sizes up to 2kBit with different security levels are available.

RFID Reader/Writer (Transceiver)

The RFID Transceiver represents the core of the RFID reader. Besides the interface to the reader’s antenna, a parallel or serial communication can be used between the Processor and the Transceiver unit. Various programming options make the TI's RFID Transceiver suitable for a wide range of proximity (communication distance to Transceiver – Tag: 50cm) RFID applications.
ISO15693, IOS14443-A bit rates ranging from 106kbps to 848kbps, ISO18000-3 and Tag-it RFID communication protocols are supported. Included with the on chip data coding/encoding is the automatic generation of SOF (Start of Frame), EOF (End of Frame), CRC and/or parity bits. The transceiver unit supports data communication levels to the MCU/I/O Interface ranging from 1.8V to 5.5V while also providing a data synchronous clock.

Processor  

For both, the Fixed and Mobile RFID Reader, the power consumption of the Processor is an important care about. The broad product portfolio of the Ultra low power MSP430 family makes it an ideal processor choice for this application. Their high level of system integration also simplifies the design and reduces system cost.
 

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