The Olympus-SoC place and route product offers a new technology that accelerates signal integrity closure for 65/45 nm and improves the reliability of manufactured silicon. The multicorner multimode capability of Olympus’ static timing analysis engine concurrently computes delay shift and glitch for any number of mode/corner scenarios in a single pass.
The solution includes several enabling technologies such as per clock, per corner, and per mode timing window computation, fast incremental signal integrity (SI) updates over all mode/corners concurrently during implementation, routing techniques such as signal integrity-driven track assignment, wire spreading, and track reordering, and SI bottleneck identification for directed concurrent delta-delay, delta-slew, glitch optimization. Customers designing at 65/45 nm are experiencing a significant increase in signal integrity-related timing violations due to increasing dominance of lateral wire capacitance. (Call company for pricing and availability.)
Mentor Graphics , Wilsonville , OR
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