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SiTime Cascade MEMS clock ICs address 5G challenges

SiTime’s Cascade MEMS clock ICs deliver 10 times higher reliability compared to other clock solutions, enabling the 5G goal of zero downtime.

The recently introduced Cascade family of MEMS clock ICs for 5G, wireline telecom, and datacenter infrastructure from SiTime Corp. is designed to deliver on the promises of 5G – higher reliability, lower latency, and zero downtime. The Cascade clock-system-on-a-chip (ClkSoC) family, the SiT9514x, delivers up to 10 times higher reliability and resilience, according to the company, enabling the 5G vision of zero downtime.

5G also is expected to deliver 10 times faster speeds, and 10,000 times more data with 50 times lower latency. This will require 10 to 30 times more devices to be deployed, and each of these connectivity gains is dependent on the accuracy, resilience, and reliability of the system’s timing, said SiTime.

The Cascade clock devices, consisting of clock generators, jitter cleaners, and network synchronizers that deliver multiple clock signals in a system, are optimized for high reliability communications and enterprise applications, where the key drivers are 5G network densification, faster expansion of cloud, and miniaturization of edge devices. The clock IC family uses the company’s recently launched third-generation MEMS resonators that deliver higher performance with lower power.

The SiT9514x platform is designed to solve the difficult timing challenges of emerging 5G infrastructure. Either standalone or together with SiTime’s MEMS precision TCXOs and OCXOs, the clock devices deliver a complete timing solution for applications such as 5G RRUs, small cells, edge computers, switches, and routers.

SiTime Cascade MEMS clock block diagram

The Cascade clock-system-on-a-chip combines SiTime’s third-generation MEMS resonator with low noise PLLs.

So how is the Cascade platform different from other solutions?

Traditionally, clock ICs with external quartz references have been used to integrate multiple timing functions and to distribute clock signals. The SiTime all-silicon clock architecture provides more integration by combining a MEMS resonator reference in the package, and eliminates quartz-related issues. The integrated MEMS resonator eliminates issues with quartz, including capacitive mismatch, and activity dips, as well as susceptibility to shock, vibration, and electromagnetic interference (EMI).

“One of the biggest differences is that we integrate the MEMS and that has two benefits,” said Piyush Sevalia, executive vice president, marketing, at SiTime.

Benefit number one is that the customer now does not have to marry the clock generator device with the quartz reference, Sevalia said. “With an integrated solution you’re done. You don’t have to worry about it because we have done the full characterization and qualification of the device with the chip inside and it’s a complete solution.”

The more system level benefit with MEMS is environmental resilience, he said. “We have many customers who don’t want to have a single piece of quartz in the system for the simple reason that it has caused them problems in terms of environmental resilience and failures.”


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The three key elements of the Cascade family is the integrated MEMS resonator that eliminates the issues with external quartz, the four independent PLLs – up to four independent clock domains and programmable PLL loop bandwidth for synchronization applications, and up to 11 outputs with an operating frequency range of 8 kHz to 2.1 GHz to support maximum consolidation of timing components in a design. Other features include programmable PLL loop bandwidth down to 1 milli-Hz, fail-safe operation in case of input clock failures through faster hitless switching between four independent inputs, and excellent phase jitter, 125 fs rms typ. (12 kHz -20 MHz).

The family also offers minimal filtering circuits, which simplifies design, saves space, and reduces the bill of materials. It also offers a host of programmable features and configuration options, flexible operating modes (synchronized, free run or holdover), and provides EVBs and TimeMaster software to map clock configurations and generate scripts for software integration for speedier development.

The SiT9514x clock-system-on-a-chip family is sampling now, and will be followed by high-volume production quantities in Q4 2020.

5G timing challenges

MEMS clocks are positioned to meet the new 5G demand by delivering improvements, such as better precision under changing temperature, increased stability under shock and vibration, and higher reliability. With 1,960M hours MTBF –SiTime’s MEMS offers 50× better reliability than quartz, which translates into 0.04 failures per year per 10,000 units, according to the company. It’s also said to be 10× more resilient to supply noise, EMI, shock, and board bending.

“In terms of 5G, what we are seeing is that there is a lot of new designs going on but at the highest level it’s about more bandwidth, faster bandwidth, and lower latency, and because some critical services could be deployed on 5G it’s about higher reliability and uptime,” said Sevalia.

And timing impacts every one of these, resulting in more difficult challenges, he added.

Sevalia cites an example where you’re driving and talking on the phone, and as you reach the end of the coverage area of one base station it has to be handed off to another base station.

The two base stations that are synchronizing need to be time aware with each other, he said. “For 4G the time error allowed is 1.5 microseconds (µs), however, for 5G, it’s been reduced to 130 nanoseconds (ns). So it literally means 1/10 the amount of time error that you have and the reason for that is because you’re transmitting at a much faster bandwidth,” he explained.

But that is only one part of the challenge, Sevalia said. “You also have to look at the amount of equipment – anywhere from 10 to 100 times more, and where the equipment is deployed. It’s not in a pristine cabinet box most of the time; it’s in the outdoor environment where you’re subjecting the equipment to all the various environmental stresses.”

These stresses can range from the vibration of big trucks driving by to lightning and thunder and rapid temperature changes. “All kinds of environmental stresses come into play, and to maintain the time accuracy of 130 ns in the presence of all these environmental disturbers is a challenge.”

Sevalia believes the SiTime solution is 10 to 30 times more environmentally resilient to shock, vibration, rapid temperature changes, and airflow, among other things, so outdoor equipment will perform better.

Another timing challenge is the entire network infrastructure needs to be upgraded to handle the higher bandwidth, and at the same time, the industry is moving to standards-based architectures, he said.

For example, the ORAN [Open Radio Access Network] Alliance is coming up with a set of standardized architectures that can be used for 5G radios, Sevalia said.

“While all of this is happening you still need a fast pipe and that fast pipe is now being done through optical modules. They’re putting optical modules everywhere. It started out with 10G then went up to 50G, 100G, and now people are deploying 400G, and they’re defining 800G,” Sevalia added. “For these optical modules to be placed everywhere, they are tiny, so you have very little area to put all your electronics.”

In addition to a smaller size, other requirements for optical modules also have to be considered such as jitter, power, phase and supply noise, and, again, environmental conditions.

In general, when selecting the right clocking solution for 5G, Sevalia recommends doing a couple of things.

With the advent of 5G the evaluation process will have to change, he said. “People will have to not just look at the datasheets – what’s the functional performance characteristics the devices provide –  they’ll also have to look at these characteristics in the presence of environmental disturbers.”

This means how is the device actually going to perform in the system when it’s subjected to all of these things, and what kind of testing and qualification is needed, he added. “The earlier that evaluation is done the more easily the system vendor can incorporate the device into their system and eliminate problems in the future.”

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