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The CDCE906 is one of the smallest and most powerful PLL synthesizers/multipliers/ dividers available.
It can produce an almost-independent output frequency from a given input frequency (a LVCMOS, differential input clock, or a single crystal). The appropriate input waveform can be selected via the SMBus data-interface controller. To achieve an independent-output frequency, reference divider M and feedback divider N for each PLL can respectively be set to values from 1 through 511 or 4095. The PLL-VCO frequency is routed from the free programmable output-switching matrix (with a 7-bit post divider) to any of the six outputs.
The CDCE906 includes three PLLs with spread-spectrum clocking (SSC). PLL1, PLL2 (also with center- and down-SSC), and PLL3 are designed for frequencies up to 167 MHz and are optimized for zero-ppm applications with wide-divider factors. Due to PLL frequency and divider settings, the internal-loop-filter components are automatically adjusted to achieve high stability and optimized jitter transfer. The device supports non-volatile EEPROM programming. At output voltages lower than 3.3 V, the output-drive current is limited. The CDCE906 is characterized for operation from 0°C to 70°C.
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For detailed information about the tool mentioned above, click here.
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By Rachel Kalina, Hearst Business Media
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