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Snuggle up a semiconductor with a graphene quilt to keep it cool

Snuggle up a semiconductor with a graphene quilt to keep it cool

New technique keeps high-power semiconductor devices from overheating


A team of researchers has developed a novel concept for keeping high-power semiconductor devices cool. This includes everything from wireless applications to traffic lights to electric cars.

The increasingly versatile graphene.

The group is based out of the University of California, Riverside Bourns College of Engineering, and in layman’s terms, their alternative method of heat-escape is accomplished by applying multiple layers of graphene to the hot spots on a semiconductor.

Background

Gallium nitride (GaN), as we all know, has long been the semiconductor material of choice for a wide variety of applications because it offers incredible efficiency, high-voltage operation, et cetera.

There is, however, one pretty big problem with GaN-based transistors: they do not dispel heat well. As a result, the development of GaN-based applications and electronics has somewhat plateaued because developers have had tremendous difficulty in finding an effective method of heat removal.

Yes, numerous thermal management solutions have been proposed, including flip-chip bonding and using composite substrates, but they’re not as effective as the industry needs them to be in order to continue advancing the technology.

Thanks to U-Cal’s Nano-Device Laboratory Group, this could soon be a concern of the past.

New solution

The group is led by Dr. Alexander Balandin, professor of electrical engineering and founding chair of the school’s Materials Science and Engineering Program (if his name sounds familiar, it’s because you probably heard it mentioned when he received the 2011 IEEE Nanotechnology Pioneer Award). Also on the team are three of Dr. Balandin’s electrical engineering graduate students: Guanxiong Liu, Zhong Yan (both Ph.D. candidates), and Javed Khan, who earned his Ph.D. and started working at Intel this year.

Dr. Alexander Balandin, center, with two of his graduate students, Guanxiong Liu (left) and Zhong Yan (right).

The group successfully demonstrated that by applying graphene-based multilayers to the hot spots found in GaN transistors, the areas lowered their temperatures by as much as 20-degrees celsius.

This drop in heat translates to an increase in the life of the device by a factor of 10.

How they did it

To understand how the group was able to accomplish such jaw-dropping numbers, one must first understand that graphene is a superb heat conductor. In fact, layers of graphene film measuring just a few nanometers thick have proven time and again to preserve excellent thermal properties. As such, they make superb candidates for applications as interconnects and lateral heat spreaders.

Armed with this knowledge, the Nano-Device Laboratory Group set out to design graphene-graphite “quilts” to be layered atop GaN transistors. The graphene-graphite quilts’ sole function was to remove and spread the heat from the transistor’s hot spots — the very opposite of what one would expect from conventional quilts.

The team studied the effects of this method using micro-Raman spectroscopic thermometry, whereupon they were able to demonstrate that hot-spot temperatures were lowered by as much as 20C in transistors operating at larger power levels.

Furthermore, computer simulations suggest that the graphene quilt approach can perform even better when used on GaN-based devices that feature more thermally resistive substrates.

Top left: optical microscopy image of high-power gallium nitride heterostructure field-effect transistor. Top right: schematic of graphene-graphite quilt atop transistor structure. Bottom right: colored scanning electron microscopy image of graphene quilt overlapping transistor. Bottom left: optical microscopy image of graphene quilt on device electrode to illustrate its flexibility.

Paper

This new approach to the thermal management of power electronics was documented in the paper “Graphene quilts for thermal management of high-power GaN transistors,” which was published May 8 in Nature Communications.

You can download it for free below. ■

Story via: The University of California, Riverside

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