SoC tool meshes simulation and prototype

The Integrated Hybrid Prototyping SOC design tool tightly couples virtual prototyping functions and HAPS-60 series FPGA-based prototyping. The user can partition SoC design blocks between virtual and FPGA-based prototype environments to maximize overall prototype performance and accelerate system bring-up by using virtual prototyping for new design blocks and FPGA-based prototyping for existing logic.

The designer can easily integrate high-performance ARM Cortex processor models and transactors for AMBA interconnect along with Synopsys DesignWare IP. Data exchange is accomplished through a high-performance Universal Multi-Resource (UMRBus) physical link. The packages Transactor Libraries supports AMBA 2.0 AHB/APB, AXI 3 AXI 4, and AXI 4 ACE Lite interconnects. (Price not given general availability Aug.)

By Jim Harrison

Synopsys , Mountain View , CA
Information 800-388-9125
www.synopsys.com