This article is Part 2 of a three-part series. Part 1 (see Reference 1) discussed the fundamental elements of digital input/output buffer information specification (IBIS) simulation models and how they are generated in the SPICE environment. This article, Part 2, investigates IBIS-model validation. Part 3, which will appear in a future issue of the
Analog Applications Journal, will show how IBIS users investigate signal-integrity issues and problems during the development phase of a printed circuit board (PCB).
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