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The move to 4K and 8K broadcasting brings new demands for high-performance IC technology

The 8K format yields ultra-high definition digital video with 33 million pixels

BY TAKAHIDE BABA, manager, visual systems business unit, AND KOTA SOEJIMA, manager, connected imaging business unit, Socionext, www.socionext.com

Major changes in video formats — and dramatic increases in file sizes — have placed a real burden on the network delivery infrastructure. Servicing the high volume of video traffic traversing the internet has generated demand for improved efficiency and maximization of available bandwidth. Busy networks need to deliver millions of megapixels with low error rates and with low latency to serve the new generations of 4K and 8K video systems coming online. The 8K format yields ultra-high definition digital video with 33 million pixels, 16 times as many as that of “Full HD,” which is widely available today. In Japan, test broadcasting of 8K is scheduled to be launched later in 2016, with full service to follow by 2018.

4K and 8K video

While 8K, also known as “UHDTV-2,” broadcasting has emerged even before 4K systems have taken hold, synergy exists between the two formats. For example, a near perfect 4K image can be derived from 8K acquisition. Color fidelity and resolution of a full 8K image down-sampled to 4K appears almost stunning. Slow-motion replays, for instance, are excellent and better than any previously available. So while 4K has a major role to play now and remains compelling, there is a noticeable move from HDTV all the way to 8K. 

Both transitions from HD present fundamental space and size challenges in broadcast capabilities. Among the most important requirements of consumer equipment is a footprint as small as is feasible, along with an absolute minimum power consumption to minimize TV cabinet size and minimize cost. 

There are also requirements for more advanced cameras to transport huge video streams in real-time back to broadcast centers. Along with the infrastructure and camera requirements comes a significantly higher demand for data storage and total network bandwidth. The new 8K cameras can easily put multiple 10-GbE ports to work, sometimes with transport capabilities as high as 40 to 50 Gbits/s. The 8K’s 7,680 x 4,320-pixel images demand huge bandwidth — roughly equivalent to a 33-Mpixel photo. A single minute of 8K video can require 275 Gbytes of storage. In addition, 8K provides a 22.2 multi-channel sound system. 

There are also challenges for system integrators, who may need to connect differing protocols or modify video formats between equipment when creating products for use by broadcast facilities.

Further requirements

These requirements lead 4K and 8K product and system designers to a specific focus on codec technology and video processing technology, with an eye on using new SoC solutions that are smaller, light on power requirements, and very bandwidth-efficient. For 4K systems, it is necessary to support 60 frames per second and compress 4K60P high-efficiency video coding (HEVC) video using a small rack unit. Chipset power should be about 8 W or so to meet the power-saving requirements of the advanced systems. Ideally, the encoder enables transmission of 4K video through live broadcast or networking distribution using only half of the total bandwidth demanded by H.264. 

Designing 8K HEVC real-time encoders using dedicated ICs is a key to enabling the development of immersive, top-quality 8K video services that are economically feasible. 

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Fig. 1: The SCH801A “Bonny” 8K decoder chip.

As an example, for the 8K video broadcasting as developed by NHK in Japan, the structure of a high-efficiency video coding bit stream is defined so that it can be decoded using multiple 4K HEVC cores. Incorporating four cores into a single IC allows for simultaneous decoding while rearranging the 8K video, 4K2K square from 8K1K slices. New 8K encoders can use a parallel encoding method in which 7,680 × 4,320-pixel images are divided into four images. The encoder ICs, capable of 4K image processing, then encode the divided images in parallel. Video coding methods, including HEVC, generally reduce the amount of information by obtaining the difference between an input image and a coded image (reference image) in accordance with image motion. In this type of encoding, which covers motion across image borders, there is a transfer of reference images among four ICs. Data transfer allows filter de-blocking across the image borders and rate control to unify quality between images that are divided. The result is a high-quality 8K video transmission, efficient and reliable, at more than 85 Mbits/s. This four-core single-chip solution has been proven in tests completed in March 2016. 

An efficient interconnect architecture can link the significant amount of equipment in the network. This allows for the establishment of virtual production systems, remote maintenance systems, and others. Using HTTP/HTML is the best option for supporting distributed and embedded server architectures.

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Fig. 2: Advanced video system.

Smart interconnect architecture

As an example device, the SCH801A SoC from Socionext conforms to the standard “Recommendation ITU-R BT.2073” for HEVC encoding of super-high definition satellite broadcasting in Japan and can decode 8K60P with a single chip. It is equipped with one lane of PCI Express Gen2 and four channels of HDMI 2.0 Tx as external interfaces. The company plans to begin volume-shipping the device in November 2016.

Socionext, the new company formed from the consolidation of two leading semiconductor companies, is focusing on SoCs for network and imaging functions. The company has also created an HEVC encoder chip, the “M31,” a compact design supporting 4K/60 fps. 

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