Tool supports new power manager ICs

The PAC-Designer version 5.2 mixed-signal design tool now supports the ispPAC-POWR1014-2 and ispPAC-POWR1014A-2 power manager devices, which are suited for integrating hot swap control, voltage rail supervision, and power-supply-sequencing ICs. The software also supports an expanded input operating frequency range of 40 to 400 MHz for ispClock5400D devices and a new graphical editor for phase and time skew programming.

In addition, the tool provides a new VHDL or Verilog HDL export feature to extract simulation models of the embedded PLD block featured on all Lattice Power Manager II family devices. This allows for functional verification of sequence and supervisory logic by the Aldec Active-HDL Lattice Web Edition simulator. (Free — available now.)

Lattice Semiconductor
Hillsboro , OR
Sales 503-268-8000

http://www.latticesemi.com/products/designsoftware/pacdesigner