Using BER testing
as a troubleshooting tool

Statistical analysis of bit-error-ratio test results
helps uncover sources of errors

BY JIM DUNFORD
SyntheSys Research
Menlo Park, CA
http://www.synthesysresearch.comBit-error-ratio (BER) testing with error location analysis has long been used in research and development environments to evaluate and improve the performance of a wide variety of systems and components in the data storage and communications industries. With the increasing recognition that BER is the most unambiguous measure of data integrity, we are now seeing wider use of these devices in the manufacturing test environment for communications systems and components. This trend has been accelerated with the availability of self-contained parallel BER testers for high-speed multiplexer and demultiplexer evaluation, often found in SONET and wavelength-division-multiplexing (WDM) applications. To make BER measurements, test data is sent through the device under test (DUT), and the output from the tested device is compared with the known test data.

High-speed parallel BER test equipment, such as the SyntheSys Research BA14400 system, have provided sophisticated data analysis techniques to pinpoint data stream error sources.

A count of inconsistencies, or errors, compared to the total number of bits sent into the device is reported as bit error ratio–illustrated in the following formula:

Localizing errors However, BER testers that show simple average error rate measurements are now being replaced by advanced digital error analyzers. These new analyzers study the exact bit error location in the stream of bits, which show error relationships that could only be guessed at previously. By studying the bit location of errors found in a data stream, BER analyzers measure independent bit and burst error statistics, correlate errors to reveal pattern sensitivities, display the probability of having error bursts of different lengths, isolate systematic error sources, and much more. For example, knowing the exact length of errors can provide clues to the cause of a failure. If all errors are precisely N bits long, finding the significance of N in the system under test will typically point to a systematic source of N-bit-long burst errors. Errors characterized Obviously, there is more to be learned from a BER measurement than whether or not a circuit is operating correctly. Finding how systematic errors correlate is paramount to tracking down the source of the errors. Like an oscilloscope, the correlation analysis is triggered either by external marker input or by a free-run counter with a programmable interval. Errors found in the data stream accumulate into the histogram bin according to the bit position where the error was found. Over time, this analysis shows the number of errors occurring at each bit position within the triggered window or programmable interval. This powerful analysis tool can reveal problems such as interference and other systematic effects. Using correlation analysis, the BER pattern is displayed as an error-free interval where systematic errors are identified as spikes rising above the random error levels. Armed with analysis information of this type, the engineer can quickly go beyond simply identifying the existence of a problem and is provided with diagnostic clues useful in identifying the source of the problem. Multiplexer testing Further increasing the utility of BER analysis is the availability of high-speed parallel BER test equipment such as the SyntheSys Research BA14400 system. The SyntheSys BA14400PG and BA14400PD are companion products that provide bit-error location analysis at up to 14.4 Gbits/s over 16 parallel data bits with independent timing adjustment for each of the input channels. The system is suitable for testing multiplexer and demultiplexer components and other parallel-channel systems. Prior to the availability of high-speed parallel test systems, the test engineer was often faced with using “gold” test parts and combining them with the DUT to allow testing with very expensive high-speed serial BER testers. Modern equipment using parallel test sequences makes it practical to test using a combination of parallel and serial testers, substantially reducing overall test system cost. This technique effectively eliminates the need for gold standard parts, and both multiplexer and demultiplexer components can be tested in the same test fixture. Similarly, testing of WDM fiber-optic communication systems can be substantially simplified using parallel bit-error analysis. WDM testing Again, 16 channels are tested simultaneously, greatly increasing test speed and providing an unambiguous characterization of system performance. The error performance of each individual channel can be isolated and, when combined with the SyntheSys Research error location analysis, the resulting test system effectively identifies and isolates errors while providing valuable tools for locating the underlying problem. The rapidly increasing speeds and complexity of communications systems have placed stringent demands on the test tools used to characterize system components. The availability of high-speed parallel bit-error analysis now allows the test system designer to save money, while at the same time increase both the speed and efficiency of the test process.