I n t e r f a c e P ro d u c t s Interface Products 67 I2C Logic Family Overview · Analog/Digital Converters · Repeaters/Hubs/Expanders · LED Blinkers · Serial EEPROMs It is frequency required to record analog information, such New bus buffers from Philips Semiconductors overcome the The LED Blinkers blink LEDs in I C and SMBus applications Small size serial memories (RAM and EEPROM) are fairly 2 where it is necessary to limit bus traffic or free up the I2C as temperature, pressure, battery level, signal strength, etc. previous system capacitance limitation of 400pF. These new bus common and widely used in many different applications. Master (MCU, MPU, DSP, chipset, etc.) timer.The uniqueness of The analog voltage information from the diode, pressure sensor, buffers allow designers more freedom in their design to expand EEPROMs are particularly useful in applications where data the use of the I2C or SMBus: these devices is the internal oscillator accurate to ±10% with transducer, etc., needs to be converted to digital 1s and 0s retention during power-off is essential.
67Interface Products Interface Products www. s e mi co n d u ct o rs.philips.c o m68 69Interface Products · Analog/Digital Converters It is frequency required to record analog information, such as temperature, pressure, battery level, signal strength, etc. The analog voltage information from the diode, pressure sensor, transducer, etc., needs to be converted to digital 1s and 0s (ADC) so that the information can be processed by a microcontroller and subsequently displayed, used to control contracts, switches, relay, etc. Conversion from digital 1s and 0s to analog voltages (DAC) is also useful for applications like LCD contrast control. I2 C/SMBus ADC and DAC devices provide an easy way to convert between digital and analog signals and send the information via the I2 C/SMBus. · Bus Controllers The bus controller serves as an interface between most standard parallel-bus microcontrollers/microprocessors and the serial I2 C bus, and allows the parallel bus system to communicate bi-directionally with the I2 C bus.This is commonly referred to as the bus master. Communication with the I2 C bus is carried out on a byte-wise basis using interrupt or polled handshake and controls all of the I2 C bus specific sequences, protocol, arbitration, and timing. · Hardware Monitors Temperature measurement is a vital part of several industrial and automotive applications.Thermal monitoring and controlling are important for high-speed microprocessors as well. Philips Semiconductors designs, manufactures, and markets a wide number of temperature sensors that support a variety of applications in the consumer, industrial, and PC markets. Our temperature sensors are subdivided into two major groups: general and PC applications.The choice of temperature sensor depends on the temperature range and other selection criteria to match the device to the particular system needs. · LED Blinkers The LED Blinkers blink LEDs in I2 C and SMBus applications where it is necessary to limit bus traffic or free up the I2 C Master (MCU, MPU, DSP, chipset, etc.) timer.The uniqueness of these devices is the internal oscillator accurate to ±10% with two programmable blink rates adjustable between 40 Hz and 6.4 seconds. To blink LEDs using normal I/O Expanders like the PCF8574 or PCA9554, the bus master must send repeated commands to turn the LED on and off.This greatly increases the amount of traffic on the I2 C bus and uses up one of the master's timers. The PCA9550, PCA9551, PCA9552, and PCA9553 LED Blinkers instead require only the initial set up command to program the frequency and duty cycle (i.e., blink rate) for each individual port BLINK RATE 1 and BLINK RATE 2. From then on, it only requires one command from the bus master to turn the individual LEDs ON, OFF, or to blink at BLINK RATE 1 or BLINK RATE 2. The LED Blinkers can also be used to dim LEDs (e.g., for back- lights) by running at the maximum blink rate and then varying duty cycle between 1 and 100%. Any bits not used for controlling the LEDs can be used for General Purpose Parallel Input/Output (GPIO) expansion. I/O expansion provides a simple solution when additional I/O is needed for ACPI power switches, sensors, pushbuttons, alarm monitoring, fans, etc. · Dip Switches I2 C commands and/or hardware pins are used to select between the default values or the setting programmed from the I2 C bus and stored in the onboard I2 C EEPROM register.These onboard values can be changed at any time via the I2 C bus.The non- volatile I2 C EEPROM register values stay resident even when the device is powered down.The device powers up with either the hardware pin inputs or the EEPROM retained value on the hardware output pins depending on the position (H or L) of the MUX select pins.The EEPROMs have 10-year memory retention and are rated for 3000 write cycles in the data sheet but have been tested to 50,000 cycles with no failures. · Repeaters/Hubs/Expanders New bus buffers from Philips Semiconductors overcome the previous system capacitance limitation of 400pF. These new bus buffers allow designers more freedom in their design to expand the use of the I2 C or SMBus: – More I2 C devices than the 400pF maximum allowed by the I2 C specification – Long bus wiring in point-to-point or multi-point applications – Different operating supply voltages or logic voltage levels within one system – Opto-isolation for safety or due to difference in ground plane – Isolating a section of a system that has lost its power supply – Insertion of unpowered cards into an active I2 C bus on multi- point backplanes like those found in CompactPCI,VME, or AdvancedTCA systems · Multiplexers/Switches Our Philips multiplexers and switches are bi-directional translating switches that are controlled by an I2 C or SMBus. They fan-out an upstream SCL/SDA pair to either 2, 4, or 8 downstream channels of SCx/SDx pairs. The multiplexers allow only one downstream channel to be selected at a time while the switches allow any individual downstream channel or combination of downstream channels to be selected. The selection depends on the contents of a programmable control register. Once one or several channels have been selected, the device acts as a wire, allowing the master on the upstream channel to send commands to devices on all the active downstream channels. Devices on the active downstream channels can communicate with each other and the master. External pull-up resistors are used to pull each individual channel up to the desired voltage level. · Serial EEPROMs Small size serial memories (RAM and EEPROM) are fairly common and widely used in many different applications. EEPROMs are particularly useful in applications where data retention during power-off is essential. Such applications include, but are not limited to, meter readings, electronic key, product identification number, and Serial Presence Detect (SPD) on DIMMs.A common pinning is used for these serial memories because their functionality is very similar.The common pinout was selected to allow interchangeability. EEPROMs store data (2Kbits organized in 256 X 8 in the PCF8582C-2 for example), such as set points, temperature, alarms, and DIMM information for a guaranteed minimum storage time of ten years in the absence of power. EEPROMs can change values up to 1,000,000 times and have an infinite number of read cycles, while consuming only 10 micro amperes of current. I2 C Logic Family Overview Clock Management 71Interface Products Clock Distribution www. s e mi co n d u ct o rs.philips.c o m70 Device Type Supply voltage V fMAX MHz Inputs number x type Outputs number x type Skew output-output ps Skew part-part ps Rise/fall time ps Operating temperature °C Other features Packages Intended application PCK111 2.5, 3.3 1500 2:1 Differential PECL 10 x Differential PECL 20 85 100 -40~+85 LQFP-32 HVQFN-32 high-performance PECL clock distribution PCKEL14 2.5, 3.3 1500 1 x Differential PECL, 1 x Single-ended PECL 5 x Differential PECL 50 200 300 -40~+85 synchronous output enable SO-20 TSSOP-20 high-performance PECL clock distribution PCKEP14 2.5, 3.3 1500 2:1 Differential PECL 5 x Differential PECL 25 100 200 -40~+85 synchronous output enable; LVDS input compatible SO-20 TSSOP-20 high-performance PECL clock distribution PCK210 2.5, 3.3 1500 2 x Differential PECL 2 x 5 Differential PECL 20 110 100 -40~+85 LQFP-32 HVQFN-32 high-performance PECL clock distribution PCK2111 2.5 800 2:1 LVDS 10 x LVDS 35 100 460 -40~+85 individual output enable; LVPECL input compatible LQFP-32 high-performance LVDS clock distribution PCK351 3.3 125 1 x LVTTL 10 x LVTTL 300 1000 1500 -40~+85 output enable SO-24 SSOP-24 LVTTL clock distribution PCK3807A 2.5, 3.3 150 1 x LVTTL 10 x LVTTL 120 600 1000 -40~+85 SO-20 SSOP-20 TSSOP-20 QSOP-20 LVTTL clock distribution PCKEP220 2.5, 3.3 1000 2 x Differential PECL/HSTL 2 x 10 Differential PECL 50 270 300 -40~+85 LQFP-52 high-performance PECL clock distribution PCKEP221 2.5, 3.3 1000 2:1 Differential PECL/HSTL 20 x Differential PECL 50 270 300 -40~+85 LQFP-52 high-performance PECL clock distribution PCKEP222 2.5, 3.3 1000 2:1 Differential PECL 15 x Differential PECL 120 300 300 -40~+85 frequency divide-by-two mode LQFP-52 high-performance PECL clock distribution PCKEP223 3.3 250 2:1 Differential PECL/HSTL 22 x HSTL 50 200 450 -40~+85 synchronous output enable LQFP-64 HSTL clock distribution PCK2001 3.3 133 1 x LVTTL 18 x LVTTL 150 250 1000 0~+70 I2C individual output enable SSOP-48 PC clock distribution PCK2001M 3.3 133 1 x LVTTL 10 x LVTTL 150 250 1000 0~+70 I2C individual output enable SSOP-28 PC clock distribution PCK2001R 3.3 133 1 x LVTTL 6 x LVTTL 150 500 1000 0~+70 I2C individual output enable SSOP-28 PC clock distribution PCK2002 3.3 300 1 x LVTTL 18 x LVTTL 150 500 1000 0~+70 I2C individual output enable SSOP-48 TSSOP-48 PC clock distribution PCK2002M 3.3 300 1 x LVTTL 10 x LVTTL 150 500 1000 0~+70 I2C individual output enable SSOP-28 TSSOP-28 PC clock distribution PCK2002P 3.3 400 1 x LVTTL 4 x LVTTL 200 500 800 -40~+85 PCI-X bus buffer SO-8 TSSOP-8 PC clock distribution PCK2002PL 3.3 400 1 x LVTTL 4 x LVTTL 200 500 450 -40~+85 PCI-X bus buffer TSSOP-8 PC clock distribution Clock Management types in bold red represent new products 73Interface Products Clock PLLs www. s e mi co n d u ct o rs.philips.c o m72 Device Name Supply voltage V Output frequency range MHz Input type Outputs number x type Jitter pk-pk ps Output skew Phase offset Programmability Operating temperature °C Other features Packages Intended application PCK857 2.5; 3.3 66~167 SSTL-2 11 x SSTL-2 100 100 150 0~+85 output enable TSSOP-48 DDR zero-delay clock distri- bution, DIMMs PCKV857 2.5 60~190 SSTL-2 11 x SSTL-2 100 100 150 0~+70 power-down; input frequency detection TSSOP-48 TVSOP-48 VFBGA-56 DDR200 – DDR266 zero-de- lay clock distribution, DIMMs PCKV857A 2.5 100~250 SSTL-2 11 x SSTL-2 75 75 50 0~+70 power-down; input frequency detection TSSOP-48 TVSOP-48 VFBGA-56 DDR200 – DDR333 zero- delay clock distribution, DIMMs PCK953 3.3 50~125 Differential PECL 9 x LVCMOS 55 100 60 Pin select 0~+70 output disable, bypass, 1:18 effective fan-out LQFP-32 High-performance clock tree design, NG-DIMMs PCK2057 2.5 70~190 SSTL-2 11 x SSTL-2 75 75 270 I2C 0~+70 individual output disable, bypass TSSOP-48 DDR zero-delay clock distribution PCK2509SA 3.3 50~150 LVTTL 10 x LVTTL 80 200 125 Pin select 0~+70 bank output enable, feedback always enabled, bypass TSSOP-24 PC100/PC133 zero-delay SDRAM clock distribution (JEDEC compliant DIMMs) PCK2509SL 3.3 50~150 LVTTL 10 x LVTTL 80 200 125 Pin select 0~+70 bank output enable, bypass, low-power mode TSSOP-24 PC100/PC133 zero-delay SDRAM clock distribution PCK2510SA 3.3 50~150 LVTTL 10 x LVTTL 80 200 125 Pin select 0~+70 output enable, feedback always enabled, bypass TSSOP-24 PC100/PC133 zero-delay SDRAM clock distribution (JEDEC compliant DIMMs) PCK2510SL 3.3 50~150 LVTTL 10 x LVTTL 80 200 125 Pin select 0~+70 output enable, bypass, low-power mode TSSOP-24 PC100/PC133 zero-delay SDRAM clock distribution PCK2059B 2.5 100~185 SSTL-2 13 x SSTL-2 75 75 75 I2C 0~+70 individual output disable, bypass TFBGA-72 DDR200 – DDR333 zero-de- lay clock distribution, DIMMs PCK2159B 2.5 100~225 SSTL-2 13 x SSTL-2 75 75 75 I2C 0~+70 individual output disable, bypass TFBGA-72 DDR200 – DDR400 zero-de- lay clock distribution, DIMMs PCKU877 1.8 125~270 Differential Clock 11 x differential 40 40 50 Pin select 0~+70 power-down; selective disable, bypass VFBGA-52 HVQFN-40 DDR2 400 – 533 zero delay clock distribution, DIMMs PCKU878 1.8 125~270 Differential Clock 11 x differential 40 40 50 Pin select 0~+70 power-down; selective dis- able, bypass, fast lock time VFBGA-52 HVQFN-40 DDR2 400 – 533 zero delay clock distribution, DIMMs PCKVF2057 2.5 60~225 SSTL-2 11 x SSTL-2 35 75 50 I2C 0~+70 individual output disable, bypass TSSOP-48 DDR200 – DDR400 zero- delay clock distribution PCKVF857 2.5 60~225 SSTL-2 11 x SSTL-2 35 75 50 Pin select 0~+70 power-down; input frequency detection TSSOP-48 TVSOP-48 VFBGA-56 DDR200 – DDR400 zero- delay clock distribution, DIMMs Clock Management 75Interface Products Clock Generation www. s e mi co n d u ct o rs.philips.c o m74 Device Type Supply voltage V Output frequency range MHz Outputs number x type Jitter pk-pk ps Output skew ps Output rise/fall time ps Programmability Operating temperature °C Other features Packages Intended application PCK12429 3.3 25~400 1 x Differential PECL 25 – 400 Serial, parallel 0~+70 synchronous output enable, frequency programmable (1MHz increments) SO-28 LQFP-32 PLCC-28 High-performance PECL clock generation PCK2000M 2.5; 3.3 14.318; 33; 66; 100 9 x LVTTL 175 175 1600 Pin select 0~+70 synchronous individual output power-down SSOP-28 CPU clock synthesis & driver for mobile 66/100MHz applications (CK97) PCK2010RA 2.5; 3.3 14.318; 16.67; 33; 48; 50; 66; 100; 133 24 x LVTTL 250 175 1600 Pin select 0~+70 spread spectrum; synchronous individual output power-down SSOP-56 CPU clock synthesis & driver for 100/133MHz Pentium II applications (CK98) PCK2014A 2.5; 3.3 14.318; 16.67; 33; 48; 50; 66; 100; 133 20 x LVTTL 150 175 1600 Pin select 0~+70 spread spectrum; synchronous individual output power-down SSOP-56 CPU clock synthesis & driver for 100/133MHz Pentium III applications (CK98) PCK2020 3.3 14.318; 16.67; 33; 48; 50; 66; 100; 126.7; 133; 200 12 x LVTTL; 1 x differential host clock output 200 150 700 Pin select 0~+70 spread spectrum; synchronous individual output power-down SSOP-56 CPU clock synthesis & driver for 100/133MHz Pentium III applications (CK00) PCK2021 3.3 14.318; 33; 48; 66; 100; 133; 200 5 x LVTTL; 6 x differential host clock output 200 150 700 Pin select 0~+70 spread spectrum; synchronous individual output power-down SSOP-48 TSSOP-48 CPU clock synthesis & driver for 100/133MHz multi-processor Pentium III applications (CK00) PCK2023 3.3 14.318; 33; 48; 66; 100; 133; 200 19 x LVTTL; 3 x differential host clock output 200 150 467 Pin select, I2C 0~+70 spread spectrum; synchronous individual output power-down SSOP-56 TSSOP-56 CPU clock synthesis & driver for 100/133MHz multi-processor Pentium IV applications (CK408) Memory Interface types in bold red represent new products 77Interface Products Registered Drivers www. s e mi co n d u ct o rs.philips.c o m76 Device Type Supply voltage V fMAX MHz Inputs number x type Outputs number x type Propagation delay CLK-Q ns Set-up time DATA-CLK ns Hold time CLK-DATA ns Operating temperature °C Other features Packages Intended application SSTL16857 2.5; 3.3 200 14 x SSTL-2 14 x SSTL-2 1.8 0.8 0.5 0~+70 master reset TSSOP-48 DDR SDRAM register SSTL16877 2.5 200 14 x SSTL-2 14 x SSTL-2 2.4 0.2 1.2 0~+70 master reset TSSOP-48 DDR SDRAM register SSTV16857 2.5 200 14 x SSTL-2 14 x SSTL-2 2.4 0.2 0.75 0~+70 master reset TSSOP-48 TVSOP-48 VFBGA-56 DDR SDRAM register SSTV16857A 2.5 200 14 x SSTL-2 14 x SSTL-2 2.4 0.2 0.75 0~+70 master reset TSSOP-48 TVSOP-48 VFBGA-56 DDR SDRAM register SSTV16859 2.5 200 13 x SSTL-2 26 x SSTL-2 2.4 0.75 0.75 0~+70 master reset TSSOP-64 LFBGA-96 HVQFN-56 DDR stacked SDRAM register SSTU32864 1.8 450 14 or 25 x SSTL_18 28 or 25 x SSTL_18 1.8 0.5 0.5 0~+70 basic DDR2 register LFBGA-96 DDR2 400 – 667 Registered DIMMs SSTU32865 1.8 450 28 x SSTL_18 56 x SSTL_18 1.8 0.5 0.5 0~+70 parity function TFBGA-160 DDR2 400 – 667 2 rank x4 Registered DIMMs SSTU32866 1.8 450 14 or 25 x SSTL_18 28 or 25 x SSTL_18 1.8 0.5 0.5 0~+70 parity function LFBGA-96 DDR2 400 – 667 Registered DIMMs SSTUH32864 1.8 450 14 or 25 x SSTL_18 28 or 25 x SSTL_18 1.8 0.5 0.5 0~+70 high output drive LFBGA-96 DDR2 400 – 667 Registered DIMMs, stacked or dual density SSTUH32865 1.8 450 28 x SSTL_18 56 x SSTL_18 1.8 0.5 0.5 0~+70 parity function, high output drive TFBGA-160 DDR2 400 – 667 2 rank x4 Registered DIMMs, stacked or dual density SSTUH32866 1.8 450 14 or 25 x SSTL_18 28 or 25 x SSTL_18 1.8 0.5 0.5 0~+70 parity function, high output drive LFBGA-96 DDR2 400 – 667 Registered DIMMs, stacked or dual density SSTVF16857 2.5 210 14 x SSTL-2 14 x SSTL-2 2.6 0.2 0.75 0~+70 reset TSSOP-48 TVSOP-48 VFBGA-56 DDR SDRAM register SSTVF16859 2.5 210 13 x SSTL-2 26 x SSTL-2 2.5 0.65 0.65 0~+70 master reset TSSOP-64 LFBGA-96 HVQFN-56 DDR stacked SDRAM register SSTVN16859 2.5 210 13 x SSTL-2 26 x SSTL-2 2.5 0.65 0.65 0~+70 master reset HVQFN-56 DDR stacked SDRAM register Memory Interface 79Interface Products Registered Drivers www. s e mi co n d u ct o rs.philips.c o m78 Device Type Supply voltage V fMAX MHz Inputs Outputs Propagation delay A-Y ns Termination resistor ohms Output driver type Operating temperature °C Other features Packages Intended application 74ALVC16334A 1.2~3.6 350 16 16 2.3 – 3-state -40~+85 inverted register enable TSSOP-48 PC100 DIMM address/- control distribution 74ALVC162334A 1.2~3.6 240 16 16 2.9 30 3-state -40~+85 inverted register enable TSSOP-48 PC100 DIMM address/- control distribution 74ALVC16834A 1.2~3.6 350 18 18 2.3 – 3-state -40~+85 inverted register enable TSSOP-56 PC100 DIMM address/- control distribution 74ALVC162834A 1.2~3.6 240 18 18 2.9 30 3-state -40~+85 inverted register enable TSSOP-56 PC100 DIMM address/- control distribution 74ALVC16835A 1.2~3.6 350 18 18 2.3 – 3-state -40~+85 – TSSOP-56 PC100 DIMM address/- control distribution 74ALVC162835A 1.2~3.6 240 18 18 2.9 30 3-state -40~+85 – TSSOP-56 PC100 DIMM address/- control distribution 74ALVC16836A 1.2~3.6 350 20 20 2.3 – 3-state -40~+85 inverted register enable TSSOP-56 PC100 DIMM address/- control distribution 74ALVC162836A 1.2~3.6 240 20 20 2.9 30 3-state -40~+85 inverted register enable TSSOP-56 PC100 DIMM address/- control distribution 74AVCM162834 1.2~3.6 500 18 18 2 15 3-state -40~+85 inverted register enable TSSOP-56 PC133 DIMM address/- control distribution 74AVCM162835 1.2~3.6 500 18 18 2 15 3-state -40~+85 – TSSOP-56 PC133 DIMM address/- control distribution 74AVCM162836 1.2~3.6 500 20 20 2 15 3-state -40~+85 inverted register enable TSSOP-56 PC133 DIMM address/- control distribution 74AVC16334A 1.2~3.6 500 16 16 1.7 – Dynamic Controlled Outputs, 3-state -40~+85 inverted register enable TSSOP-48 PC133 DIMM address/- control distribution 74AVC16834A 1.2~3.6 500 18 18 1.7 – Dynamic Controlled Outputs, 3-state -40~+85 inverted register enable TSSOP-56 TVSOP-56 PC133 DIMM address/- control distribution 74AVC16835A 1.2~3.6 500 18 18 1.7 – Dynamic Controlled Outputs, 3-state -40~+85 – TSSOP-56 TVSOP-56 PC133 DIMM address/- control distribution 74AVC16836A 1.2~3.6 500 20 20 1.7 – Dynamic Controlled Outputs, 3-state -40~+85 inverted register enable TSSOP-56 TVSOP-56 PC133 DIMM address/- control distribution 74ALVCHS16830 2.3~3.6 500 18 36 2 – 3-state -40~+85 bus hold on inputs TVSOP-80 NG-DIMM registered drivers 74ALVCHS162830 2.3~3.6 500 18 36 2 26 3-state -40~+85 bus hold on inputs TVSOP-80 NG-DIMM registered drivers 74ALVCH16832 2.3~3.6 150 7 28 2.5 – 3-state -40~+85 bus hold on inputs; select register/buffer mode TSSOP-64 registered memory driver 74ALVCHT16835 2.3~3.6 150 18 18 2.3 – 3-state -40~+85 bus hold on inputs TVSOP-56 registered memory driver UARTs 81Interface Products 16C UARTs www. s e mi co n d u ct o rs.philips.c o m80 Device Type Channel VCC (+/- 10%) Data Rate at 5V/3.3V/2.5V (Mbps) Rx & Tx FIFO Bytes IrDA I/O PINS Rx/Tx FIFO INT Trigger RTS/CTS Flow Control S/W Flow Control Intel or Motorola Data Bus Interface Power Down Mode Package Part Number Temp Range -40 to 85ºC SC16C550B 1 2.5V-5.5V 3.0/2.0/1.0 16 No 8 (note 1) 4 levels/none Yes No Intel No PLCC44 LQFP48 DIP40 SC16C550BIA44 SC16C550BIB48 SC16C550BIN40 SC16C650B 1 2.5V-5.5V 3.0/2.0/1.0 32 Yes 8 (note 1) 4 levels/4 levels Yes Yes Intel Yes PLCC44 LQFP48 HVQFN32 DIP40 SC16C650BIA44 SC16C650BIB48 SC16C650BIBS SC16C650BIN40 SC16C750B 1 2.5V-5.5V 3.0/2.0/1.0 16 or 64 No 8 (note 1) 4 levels/none Yes No Intel Yes PLCC44 LQFP64 HVQFN32 SC16C750BIA44 SC16C750BIB64 SC16C750BIBS SC16C2550B 2 2.5V-5.5V 5.0.5.0/3.0 16 No 14 (note 2) 4 levels/none No No Intel No PLCC44 LQFP48 DIP40 SC16C2550BIA44 SC16C2550BIB48 SC16C2550BIN40 SC16C2552B 2 2.5V-5.5V 5.0.5.0/3.0 16 No 14 (note 2) 4 levels/none No No Intel No PLCC44 SC16C2552BIA44 SC16C652B 2 2.5V-5.5V 5.0.5.0/3.0 32 Yes 14 (note 2) 4 levels/4 levels Yes Yes Intel Yes LQFP48 HVQFN32 SC16C652BIB48 SC16C652BIBS SC16C752B 2 2.5V-5.5V 5.0.5.0/3.0 64 No 14 (note 2) Programmable Yes Yes Intel Yes LQFP48 HVQFN32 SC16C752BIB48 SC16C752BIBS SC16C554B 4 2.5V-5.5V 5.0.5.0/3.0 16 No 24 (note 3) 4 levels/none Yes No Intel or Motorola (68-pin PLCC only) No PLCC68 LQFP64 LQFP64 LQFP80 SC16C554DBIA68 SC16C554DBIB64 SC16C554BIB64 SC16C554BIB80 SC16C654B 4 2.5V-5.5V 5.0.5.0/3.0 64 Yes 24 (note 3) 4 levels/4 levels Yes Yes Intel or Motorola (68-pin PLCC only) Yes LQFP64 PLCC68 LQFP64 SC16C654DBIB64 SC16C654BIA68 SC16C654BIB64 SC16C754B 4 2.5V-5.5V 5.0.5.0/3.0 64 No 24 (note 3) Programmable Yes Yes Intel Yes PLCC68 LQFP80 SC16C754BIA68 SC16C754IBB80 Note 1: 6 of these pins might be used for control signal such as: RTS, DTR, CTS, DSR, RI, CD. HVQFN package only has 5 I/O pins Note 2: 12 of these pins might used for control signal such as: RTS, DTR, CTS, DSR, RI, CD. HVQFN package only has 6 I/O pins Note 3: all of these pins might be used for control signal such as RTS, DTR, CTS, DSR, RI, CD W hy c h o o s e P h i l i p s S e m i c o n d u c t o r s ? Features * Broad portfolio of single, dual and quad UARTs * All devices operate at 2.5V, 3.3V and 5V and are specified at indus- trial temperature range (-40 to +85ºC) * Fastest bus cycle times in the industry * Power down mode * Supports IRDA feature * Shareware for programming readily available * Automatic hardware and software flow control * Supports DMA mode and includes a wide variety of FIFO depth * Pin to pin compatible with existing 16C devices Benefits * One stop shopping for various applications * One part fits multiple needs/applications (lowers the cost of inven- tory, compared to competitor solutions) * Shortens design cycle * DMA and deep FIFOs reduce CPU overhead * Compatibility with high speed processors * Ideal for battery operated systems * Allows wireless short range applications * Alternate source to other manufacturers Related literature Title Order code 16C and Industrial Competitive Cross Reference Flyer 9397 750 09893 28L202 Leaflet 9397 750 12777 16CxxxB Leaflet 9397 750 12787 UARTs Sell Sheet 9397 750 11977 Innovative UART Solutions Brochure 9397 750 10337 16Cxxx UARTs Product Overview UARTs 83Interface Products Industrial UARTs www. s e mi co n d u ct o rs.philips.c o m82 Device Type Comment Channel VCC ( +/- 10%) Data Rate at VCC Rx/Tx FIFO Bytes Arbitrating Interrupt I/O PINS 16-bit Counter/Timer Rx & Tx FIFO Counters Rx/Tx FIFO INT Trigger S/W Flow Control Intel or Motorola Data Bus Interface Power Down Mode Package Part Number Temp Range 0 to 70°C Part Number Temp Range -40 to 85ºC SCC2691 Single Channel version of SCC2692 1 5V 125 Kbps 3/1 Normal 2 1 no 3/1 LEVEL No Intel Yes DIL24 SOL24 PLCC28 SCC2691AC1N24 SCC2691AC1D24 SCC2691AC1A28 SCC2691AE1N24 SCC2691AE1A28 SC28L91 Low power Single Channel version of SC28L92 1 3.3V- 5V 1000 Kbps 16/16 or 8/8 Normal Multi level Vectored IACK/DACK 15 1 yes ALL No Intel/Motorola (Pin select) Yes PLCC44 QFP44 SC28L91A1A SC28L91A1B SC28L201 Single channel version of SC28L202 1 3.3V- 5V 3125 Kbps 256/256 Normal Multi level IACK/DACK I2A 16 2 yes ALL Auto Intel/Motorola (Pin select) Yes TSSOP48 SC28L201A1DGG SCC2681 CMOS Version of SCN2681 2 5V 125 Kbps 3/1 Normal 15 1 no 3/1 LEVEL No Intel No DIL28 DIL40 PLCC44 SCC2681AC1N28 SCC2681AC1N40 SCC2681AC1A44 SCC2681AE1N28 SCC2681AE1N40 SCC2681AE1A44 SCC68681 CMOS Version of SCN68681 2 5V 125 Kbps 3/1 Normal Vectored 14 1 no 3/1 LEVEL No Motorola No DIL40 PLCC44 SCC68681AC1N40 SCC68681AC1A44 SCC68681AE1N40 SCC68681AE1A44 SCC2681T CMOS Version of SCN2681T 2 5V 500 Kbps 3/1 Normal 15 1 no 3/1 LEVEL No Intel Yes PLCC84 SCC2681TC1A44 SCC2692 Lower Speed Version of SC26C92 2 5V 125 Kbps 3/1 Normal 15 1 no 3/1 LEVEL No Intel Yes DIL28 DIL40 PLCC44 QFP44 SCC2692AC1N28 SCC2692AC1N40 SCC2692AC1A44 SCC2692AC1B44 SCC2692AE1N28 SCC2692AE1N40 SCC2692AE1A44 SCC2692AE1B44 SCC68692 Lower Speed Version of SCC26C92 2 5V 125 Kbps 3/1 Normal Vectored IACK/DACK 14 1 no 3/1 LEVEL No Motorola Yes DIL40 PLCC44 SCC68692AC1N40 SCC68692AC1A44 SCC68692AE1N40 SCC68692AE1A44 SC26C92 High Speed Version of SC26C92 2 5V 1000 Kbps 8/8 Normal Multi level 15 1 yes ALL No Intel Yes DIL40 PLCC44 QFP44 SCC2692A1N SCC2692A1A SCC2692A1B SC28L92 Low Power, Faster Version of SC26C92 2 3.3V- 5V 1000 Kbps 16/6 or 8/8 Normal Multi level Vectored IACK/DACK 15 1 yes ALL No Intel/Motorola Yes PLCC44 QFP44 SC28L92A1A SC28L92A1B SC28L202 Enhanced faster version of SC28L92 2 3.3V- 5V 3125 Kbps 256/256 Normal Multi level IACK/DACK I2A 16 2 yes ALL Auto Intel/Motorola (Pin select) Yes TSSOP56 SC28L202A1DGG SC28C94 Enhanced Quad version of SC26C92 4 5V 1000 Kbps 8/8 Normal Multi level IACK/DACK I2A 16 2 yes ALL No Intel/Motorola Yes PLCC52 SC28C94A1A SC28L194 Enhanced version of SC28C94 4 3.3V- 5V 1000 Kbps 16/16 Normal Multi level IACK/DACK I2A 16 2 yes ALL Auto Intel/Motorola Yes PLCC68 LQFP80 SC28L194A1N SC28L194A1A SCC2698B Quad version of SCC2692 8 5V 125 Kbps 3/1 Normal 32 4 no 3/1 LEVEL No Intel Yes PLCC84 SCC2698BC1A84 SCC2698BE1A84 SC28L198 Enhanced version of SCC2698B 8 3.3V- 5V 1000 Kbps 16/16 Normal Multi level IACK/DACK I2A 32 2 yes ALL Auto Intel/Motorola Yes PLCC84 LQFP100 SC28L198A1A SC28L198A1BE W hy c h o o s e P h i l i p s S e m i c o n d u c t o r s ? Features * Broad line of UARTs from single to octals * Power down mode * Extensive interrupt support * Hardware RS485/Multidrop support * Automatic outband flow control * All receivers and transmitters are fully independent with respect to speed and clock frequency * Flexible and programmable I/O structure Benefits * Many choices for various applications * Ideal for low power consumption * Reduced software overhead * Reduction of CPU overhead * Avoids los of data * Transmit and receiv channel can operate at different baud rates * Allows usage of I/O pins for general purposes Related literature Title Order code 16C and Industrial Competitive Cross Reference Flyer 9397 750 09893 28L202 Leaflet 9397 750 12777 16CxxxB Leaflet 9397 750 12787 UARTs Sell Sheet 9397 750 11977 Innovative UART Solutions Brochure 9397 750 10337 Industrial UARTs Product Overview I2C Logic W hy c h o o s e P h i l i p s S e m i c o n d u c t o r s ? 85Interface Products I2C Analog to Digital Converter www. s e mi co n d u ct o rs.philips.c o m84 Type Number Package Application Function Operating Temperature Range °C # of Pins Converter Type VDD (max.) # of bits Operating Supply Voltage PCF8591 SOT38-4 (DIP16) SOT162-1 (SO16) Radio,Audio and CD/DVD Systems Converters -40 to +85 16 Analog to Digital 16 8 8 I2C Bus Controllers Type Number Package Interrupt Hardware Reset Operating Temperature Range °C I2C Bus (kHz) Operating Voltage # of Addresses PCA9564 SOT662-1 (HVQFN20) SOT163-1 (SO20) SOT360-1 (TSSOP20) 0-1 Yes -40 to +85 400 2.3-3.6 tolerant to 5.5 128 PCF8584 SOT146-1 (DIP20) SOT163-1 (SO20) 0-1 Yes -40 to +85 100 4.5-5.5 128 I2C Temperature Sensors Type Number Package Operating Temperature °C Operating Voltage Range VDC Standby Current mA Over-Temp Alert Under-Temp Alert Internal Temp Monitor Remote Temp Monitor Accuracy on-chip +/- °C Accuracy Remote +/- °C SMBus Clock (max.) kHz I2C-Bus Controlled Assignable Addresses LM75A SO8 TSSOP(MSOP)8 -55 to +125 2.8 – 5.5 00.35 Y N Y N 2 at -25 – +100 3 at -55 – +125 NA 400 Y 8 NE1617A SSOP(QSOP)16 0 to +120 3.0 – 5.5 10 Y Y Y Y 2 at +60 – +100 3 at 0 – +125 3 at +60 – +100 5 at 0 – +125 100 Y 9 NE1618 SSOP(QSOP)16 0 to +120 3.0 – 3.6 3 Y Y Y Y 1.5 at +60 – +100 3 at 0 – +120 3 at +60 – +100 5 at 0 – +120 100 Y 9 NE1619 SSOP(QSOP)16 0 to +120 2.8 – 5.5 100 N Y Y Y 2 at +25 3 at 0 – +120 3 at +25 5 at 0 – +120 400 Y 2 SA56004 SO8 TSSOP(MSOP)8 0 to +125 3.0 – 3.6 10 Y Y Y Y 2 at +60 – +100 3 at 0 – +125 1 at +60 – +100 3 at 0 – +125 400 Y 8 SE95 SO8 TSSOP(MSOP)8 -55 to +125 2.8 – 5.5 3.5 Y N Y N 1.5 at -25 – +100 3 at -55 – +125 NA 400 Y 8
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