Virtex-6 FPGAs enable higher bandwidth, lower-power systems

Virtex-6 FPGAs enable higher bandwidth, lower-power systems

40-nm devices feature up to 64 high-speed transceivers, up to 760 K logic elements, and 11-Gbit/s serial I/O

Built using 40-nm technology. the Virtex-6 family of high-performance FPGAs has up to 760 K logic density, more than 38 Mbits of BlockRAM, and 2,000 DSP slices. The chips are said to have up to 50% lower power and 20% lower cost than the previous generation.

The family offers LX, SX, and HX versions, with the HX version having up to 64 serial transceivers that run at up to 11.4 Gbits/s, enabling support for optical transport unit specifications, PCI Express-compliant hard blocks, and dedicated DDR3 memory controllers. The devices operate on a 1.0-V core voltage with a 0.9-V low-power option. They are supported by advanced development tools and a vast library of hard and soft IP. ($57 to $2,100 ea/high volume samples available 2nd qtr.)

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