The 6U FPE650 FPGA processing engine board supports the new FPGA Mezzanine Card (FMC/VITA 57) standard. The card has four Virtex-5 FPGAs with two FMC I/O sites with four full-duplex multi-gigabit/s connections and VPX high-speed serial backplane connectivity.
Each FPGA has four directly connected banks of memory, four banks of 9-Mbyte QDR2 SRAM or two banks of 9-Mbyte QDR2 SRAM and two banks of 640-Mbyte DDR2 SDRAM. For front panel I/O, each FMC site has 68 2 Gbit/s differential signal pairs. High-speed serial links from the FMC sites, the FPGA, and the backplane are routed to a nonblocking crossbar switch. (From $30,000 — available September.)
Vmetro , Houston , TX
Sales 281-584-0728
Learn more about Vmetro