There are so many different analog-to-digital converters (A/D) available these days that you do not have to be an analog signal-chain expert to pick one. Well…maybe and maybe not. Just what are your choices?
There are stand-alone (or discrete) A/Ds that range from typically 8 bits up to 24 bits, and even some 32-bit options. A/Ds are also integrated into microcontrollers, FPGAs, microprocessors, or SoCs. There are successive approximation register (SAR) A/Ds and sigma-delta versions. Pipeline A/Ds are used when the highest sample rate speed is needed. Some A/Ds sample at around 10 s/s and some well above 1 Gs/s. A/Ds range in price from less than $1 to $265, or more.
How important are the speed, power, and accuracy? To help you choose the right, or best, A/D for your application, we will take a closer look at these various types and explain their optimal operating conditions.
SAR A/Ds—for midrange speed and snapshot data
SAR A/Ds offer a wide range of bits and speed. Ranging from 6 or 8 bits to as much as 20, SAR A/Ds typically operate between a few ks/s to as much as 10 Ms/s. SAR A/Ds are a good choice for midrange speed applications such as motor control, vibration analysis, and system monitoring. These are not as fast as pipeline A/Ds (discussed below), but they are typically faster than delta-sigma A/Ds (also discussed below).
SAR A/Ds scale power dissipation directly with the sample rate. For example, a chip that dissipates 5 mW at 1 Msps will typically dissipate just 5 µW at 1 ksps. Consequently, SAR A/Ds are very flexible and a customer can stock one part number for multiple applications.
There is another advantage for SAR A/Ds: they take a “snapshot” of the analog input signal. A SAR architecture samples just a single moment in time. When might a designer want this? When you need to measure multiple signals simultaneously, you can do simultaneous sampling with multiple single SAR A/Ds, or use a simultaneous-sampling A/D with multiple A/Ds or multiple track-and-hold (T/H) cores inside it. This allows the system to measure the multiple analog inputs at the same instant.
Current and voltage transformers use a SAR ADC for a protection-relay application. Here, the customer measures the different current and voltage phases at the same instant. An electrical utility is a good example. With precise snapshot data, the utility knows exactly what is coming down the electrical lines and how to manage the power grid most effectively.
Sigma-Delta A/Ds—for higher accuracy
When you want the accuracy from more sampling bits or really need the highest effective number of bits (ENOB), sigma-delta A/Ds are usually the best choice, especially for low-noise precision applications. When speed is not as critical, the oersampling and noise shaping of a sigma-delta A/D affords very high precision.
As the SAR A/D market started to become saturated 5 to 10 years ago, many analog companies invested in multiple sigma-delta cores. The result today is very good A/Ds up to 24 or 32 bits and with sample rates between 10 s/s to a few Ms/s.
What applications might need > 20 bits of noise-free resolution? Instrumentation units and gas chromatographs or the oil and gas industries are example applications that typically demand precision from as many bits as possible. These are system applications that set the benchmark for precision analog signals, the applications where end users must be absolutely sure of their data—exactly how much sweet crude or natural gas is flowing.
Modulator or not?
Recently sigma-delta A/Ds have become more difficult to classify in terms of speed and sample rates. Traditional sigma deltas did all of the digital postprocessing internally (e.g., with SINC/notch filters, decimation, and noise shaping). From there, data was sent out serially with very good ENOB. For example, if you had a 24-bit A/D, the data output included 24 bits. The first bit output was the most significant bit (MSB) and the 24th bit was the least. Your data output rate was typically the serial clock rate divided by 24. These were not the fastest, nor the most flexible A/Ds.
In the last 5 to 10 years, however, sigma-delta modulators have become more popular, particularly in applications that need a good amount of speed (often around 1 Ms/s or more). Rather than waiting until the full 24-bit output has been decimated, the sigma-delta modulator streams out the data one bit at a time and leaves the digital filtering for analysis in the processor or FPGA.
This modulator flexibility is helpful for an application such as motor control, where 12 to 16 bits may be sufficient. Here the motor controller may not need or want to wait for the last 8 LSBs in a 24-bit data stream if the first 16 bits provide a sufficient amount of analog measurement.
Choose SAR vs. sigma delta – the determinant is speed
Input filters are another important consideration. Recall that the SAR architecture takes a high-speed snapshot. When an application pushes to higher sampling rates the input filter becomes more complex. Often then, an external buffer or amplifier is needed to drive the input capacitor and settle in a short period, and that the amplifier must have sufficient bandwidth. Figure 1 shows this example with the 16-bit, 500 ks/s MAX11166 SAR A/D. The higher the bits and the faster the sample rate, the shorter the time constant that the input has to settle and to have a correct input reading.
In Figure 1, the MAX9632 amplifier, with 55 MHz gain bandwidth, is used and followed by a simple RC filter. This particular amplifier offers < 1nV/root-Hz noise, making it possible to get every tenth of a dB of ENOB from the system.
Fig. 1: SAR A/D converter input filter example shows the MAX9632 amplifier with 55 MHz gain bandwidth driving the input.
Compared to SAR A/Ds, the input in a delta-sigma is oversampled so many times that the anti-aliasing filter requirements are not as strict. Often, a simple RC filter will suffice. Figure 2 is an example with the MAX11270 24-bit, 64 ksps sigma-delta A/D. Here, a Wheatstone bridge example is shown with a 10 nF capacitor across the differential inputs.
Fig. 2. Sigma-delta ADC (MAX11270) input filter example requires just a simple RC filter externally.
Pipeline A/Ds – for super-fast sampling
In the introduction we mentioned pipeline A/Ds as important for the highest sample rates such as RF applications and software-defined radios. Top analog companies have been heavily investing R&D into pipeline A/Ds over the last 10 years.
Of course, the top two figures of merit for pipeline A/Ds are speed and power. With sample rates between about 10 Ms/s up to a few Gs/s, the interface to these devices becomes very critical. The next big battlefield in pipeline A/Ds is likely to be based around their digital output. Parallel digital has been the interface of choice. A serial LVDS interface has served in applications, such as ultrasound, that have a large number of channels and where sample rates between 50 and 65 Ms/s have historically been sufficient. But, there are new interfaces.
JESD204B serial interfaces
A JESD204B serial interface is a high-speed serial standard up to 12.5 Gbits/s. This interface emerged in recent years and has allowed the A/D makers have pushed their sample rates higher and higher, as have the FPGA and processor companies with their serial transceivers (or SerDes).
In a multichannel application with many A/Ds in parallel, a rat’s nest of wiring between the A/D and the FPGA/processor is a chore to handle. With JESD204B serial interfaces, the number of data lines is reduced dramatically and board space is preserved. Figure 3 shows a single serial output pair and a sync input for this interface, which greatly reduces the number of I/O pins required.
* Modulator output speed
Fig. 3: JESD204B serial interface greatly reduces the number of data lines between the A/D and the FPGA/processor.
Note that plenty of articles have been written on JESD204B in recent years and more in-depth details can best be found there.
Critical power concern with pipeline A/Ds
Now that more A/Ds can be packed in a tight space, power becomes even more of an issue and leading A/D manufacturers are always battling to reduce power. A good rule is 1 mW per 1 Ms/s. If you’re A/D is close to that, you have a good starting point.
A/Ds Optimized for MCUs, FPGAs, CPUs, and SoCs
A/Ds integrated into micros have not typically been the highest quality. Historically, when a 12-bit A/C was embedded in a micro, it was much more likely to perform like an 8-bit A/C in terms of effective number of bits (ENOB) or linearity. To ensure adequate A/D performance, users definitely had to carefully review specifications and determine which were guaranteed. It was not uncommon to see only typical specs or minimum and maximum specs with incomplete conditions listed.
Recently, A/D performance such as integral nonlinearity (INL), differential nonlinearity (DNL), gain error, and ENOB has improved enough to enable quality performance in MCUs and the number of micros with integrated A/Ds has grown considerably. Today if the application needs 12 bits or less and only a few channels, an MCU is likely to be the most cost-effective solution.
FPGAs manufacturers have also begun to integrate A/Ds into their systems. Xilinx, for example, offers a 12-bit, 1 Ms/s A/D in all of their 7 Series FPGAs and Zynq SoCs. The position on a circuit board of an MCU or SoC is critical. The CPU module with the FPGA or SoC may be a long way from the analog-input signals – which may be on a completely separate card with a high-speed digital backplane connecting the two. You do not want to route sensitive analog across such a connection, so integrating an A/D in this case may not be a good idea. This is where you definitely want a good discrete A/D, with 24-bit sigma-delta A/Ds as the most common choice in applications like programmable logic controllers (PLC).
Staying with the PLC example, isolation is another element to consider. The majority of PLC analog inputs include some form of isolation, typically digital. Many analog-input modules will integrate low-cost micros for fast response and quick interrupts. Now the location of the isolation dictates whether an internal A/D is feasible. If the isolation sits between the processor (or MCU) and the backplane, an A/D integrated into the micro is your friend. If the MCU needs to be isolated from the high-voltage input signals, then a discrete A/D and a digital isolator is the best solution.
What is your best choice?
We have talked about several A/D options available today, so what about the original question: how important are the speed, power, and accuracy of the signals you are measuring?
If you only need a simple low-resolution reading for a housekeeping function, the integrated A/D in a MCU, FPGA, processor, or SoC can probably do the job. If your application is low speed (close to DC) like a slow-moving temperature signal, a sigma-delta A/D is likely the best. If you have a reasonably fast signal like a vibration analysis of a motor humming along at 1,000 RPM, a SAR A/D is likely the best. If the application must measure the fastest analog signals in the world, then a pipeline A/D is the best choice.
The common theme with all of this is, “It depends.” No engineer likes hearing that. If you are a digital designer or a power-supply expert tasked with picking the right A/D, you prefer more explicit instructions. But A/Ds are often complex, nuanced ICs that require investigating the data sheet and an evaluation kit. Table 1 summarizes the typical minimum and maximum specifications for A/Ds on the market today. This is a changing landscape for certain. What will we change here next year?
Table 1: Typical A/C converter specification ranges
| A/D Architecture/Specs | Sample Rate/Speed | Resolution/Bits | Price | Power |
| SAR | DC to 10 Ms/s | 8 to 20 | Low to medium | Lowest per ks/s |
| Sigma Delta | DC to 20 Ms/s* | 16 to 32 | Low to medium | Low to medium |
| Pipeline | 10 Ms/s to 5 Gs/s | 8 to 16 | Highest | Highest |
| Integrated in MCU/FPGA/SoC | DC to 1 Ms/s | 8 to 16 | Lowest | Low to medium |
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