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WP221 Static Power and the Importance of Realistic Junction Temperature Analysis White Paper

WP221 Static Power and the Importance of Realistic Junction Temperature Analysis White Paper

White Paper: Virtex-4 Family R WP221 (v1.0) March 23, 2005 Static Power and the Importance of Realistic Junction Temperature Analysis By: Matt Klein Total power consumption of a board or system is important; each FPGA or ASIC in a system is beginning to be forced to meet a power budget. With this concern and the trend of increasing static power with use of high performance 90 nm FPGAs, Xilinx has put considerable effort into reducing static power in the VirtexTM-4 FPGAs. To this end, it is important to consider a realistic operating temperature for the FPGAs, which can easily have junction temperature up to and in excess of 85°C. As junction temperature rises, static power rises exponentially, fueling this concern. © 2005 Xilinx, Inc.


WP221 (v1.0) March 23, 2005 www.xilinx.com 1 © 2005 Xilinx, Inc. All rights reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc. All other trademarks are the property of their respective owners. Total power consumption of a board or system is important; each FPGA or ASIC in a system is beginning to be forced to meet a power budget. With this concern and the trend of increasing static power with use of high performance 90 nm FPGAs, Xilinx has put considerable effort into reducing static power in the VirtexTM-4 FPGAs. To this end, it is important to consider a realistic operating temperature for the FPGAs, which can easily have junction temperature up to and in excess of 85°C. As junction temperature rises, static power rises exponentially, fueling this concern. White Paper: Virtex-4 Family WP221 (v1.0) March 23, 2005 Static Power and the Importance of Realistic Junction Temperature Analysis By: Matt Klein R 2 www.xilinx.com WP221 (v1.0) March 23, 2005 White Paper: Static Power and the Importance of Realistic Junction Temperature Analysis R Introduction Customers expect FPGA and ASIC vendors to reduce cost and increase performance. Typically, this was achieved in the past by reducing transistor sizes, hence increasing the performance and decreasing the die area and cost. Reducing transistor sizes increases transistor leakage current, and therefore static power. With 90 nm technology in FPGAs or ASICs, there is a particular challenge to reduce static power. A further problem is that leakage rises dramatically with junction temperature. This white paper describes where static power comes from and its variation with temperature, providing insight into how Virtex-4 FPGAs address decreasing static power. Xilinx leverages its vast experience as the industry leader, producing millions of 90 nm FPGAs, to research this issue and consequently reduce power in 90 nm Virtex-4 FPGAs. Even though system speeds are increasing, core voltage is dropping, which reduces the rate of increase of dynamic power; however, static power is growing exponentially over time as we move to smaller and smaller technology nodes because of increasing transistor leakage. Figure 1 from the International Technology Roadmap for Semiconductors (ITRS) shows a cross-over point as the industry arrives at 90 nm and smaller technology nodes, where static power is beginning to eclipse dynamic power for many applications. Figure 1: Static and Dynamic Power vs. Technology Node 1990 1995 2005 2010 2015 2020 0.0000001 0.0001 0.01 1 100 500 350 180 90 45 2265130250 International Technology Roadmap for Semiconductors (ITRS) 2001, 2002. Courtesy: Moore's Law Meets Static Power, Computer, December 2003, IEEE Computer Society Static Power Significant at 90 nm NormalizedPower Technology Node (nm) Static Power (leakage) 2000 Dynamic Power wp221_01_032305 White Paper: Static Power and the Importance of Realistic Junction Temperature Analysis WP221 (v1.0) March 23, 2005 www.xilinx.com 3 R Decreased Power Lessens Other System Design Issues FPGAs are being used increasingly in many applications, so reducing power consumption in FPGAs provides huge benefits to the system design. Some of the key benefits are shown below: · Fewer thermal concerns – lower power causes smaller rise in junction temperature, preventing thermal runaway: Use smaller heat sinks or no heat sinks at all. Allow for a simpler system thermal design requiring less airflow and smaller or fewer fans. · Lower cost power system – reduced power requires smaller power supplies: Power supplies cost from $0.50-$1.00/Watt. Additionally, there are some total power system considerations where it is important to stay below a step function jump, such as 100 Automotive, Aerospace and Defense 100 > 100 > 100 10 www.xilinx.com WP221 (v1.0) March 23, 2005 White Paper: Static Power and the Importance of Realistic Junction Temperature Analysis R Typically, designers using FPGAs have power budgets ranging from

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