Xilinx Drives Evolution of FPGA Design With Domain-specific Methodology for Targeted Design Platforms

Xilinx Drives Evolution of FPGA Design With Domain-specific Methodology for Targeted Design Platforms

New ISE Design Suite 11.1 sets industry standard for delivering FPGA design tools and intellectual property to embedded, DSP and logic designers

SAN JOSE, Calif., April 27, 2009 /PRNewswire/ — Xilinx (Nasdaq: XLNX) today announced that it is now shipping ISE Design Suite 11.1, the industry’s first FPGA design solution with fully interoperable domain-specific design flows and user-specific configurations for logic, digital signal processing (DSP), embedded processing, and system-level design. The release of ISE Design Suite 11.1 is a major milestone in the delivery of targeted design platforms with simpler, smarter design methodologies for creating FPGA-based system-on-chip solutions targeting a wide variety of markets and applications.

This latest release of the award-winning ISE Design Suite from Xilinx pioneers new ground for delivering sophisticated FPGA design technologies to a user community that is extraordinarily diverse with four domain-specific design configurations: the Logic Edition, DSP Edition, Embedded Edition, and System Edition. Each Edition provides a complete FPGA design flow tailored for the user profile (engineer persona) and domain-specific methodology and design environment requirements, enabling designers to focus their efforts on creating value-added, competitively differentiated product applications.

ISE Design Suite 11.1 also incorporates new features and ease-of-use enhancements to the base-level FPGA and domain-specific tools, technologies, and intellectual property (IP) components delivered with Xilinx targeted design platforms. Introduced by Xilinx with its new Virtex-6 and Spartan-6 FPGA families, targeted design platforms provide embedded, DSP, and hardware designers alike with access to a wide array of silicon devices supported by open standards, common design flows, IP, development tools, and run-time platforms. The ISE Design Suite 11.1 release shrinks development cycles up to 50 percent, reduces dynamic power consumption by 10 percent on average, and boosts tool performance by 2X for current generation Virtex-5 and Spartan-3 FPGA-based designs and enables early access customers to start designing with targeted design platforms based on the latest Virtex-6 and Spartan-6 devices.

“New FPGA users are coming from different design disciplines, and they approach design from their unique perspectives. It is no longer feasible to expect that one design flow or environment fits every designer’s needs,” said Tom Feist, senior marketing director for ISE Design Suite at Xilinx. “Our ISE 11.1 release addresses this reality, and provides the tools designers need with targeted design platforms that reflect the way they work, so they can go from concept to production in the fastest possible time. This domain-specific approach establishes a new interoperability benchmark for FPGA design tools that is backed by more than two years of R&D and extensive beta testing with early access customers.”

“The ISE Design Suite 11 offers significant advancements in terms of a complete design environment for just about any type of designer who wants to work with FPGAs,” said Shepard Siegel, CTO of Atomic Rules LLC. “Based on our own experience with the pre-release of the ISE Design Suite 11 in about a half dozen designs, we have realized considerable improvement in all areas of our projects with a reduction in runtimes by a third and 10% improvement in both utilization and Fmax performance.”

Domain-optimized Design Configurations

Each ISE Design Suite 11.1 Edition provides a front-to-back design environment built on Xilinx exclusive technologies for design entry, synthesis, implementation, and verification with integration to industry-leading third-party synthesis and simulation solutions. In this way, designers can select the configuration that is best suited to their methodology and Xilinx targeted design platform for the ultimate in productivity, fastest time to design completion, and optimal quality of results.

ISE Design Suite Logic Edition is optimized for logic and connectivity designers with the Xilinx Base Targeted Design Platform, and includes: ISE Foundation, ISE Simulator, PlanAhead(TM) Design and Analysis Tool, ChipScope(TM) Pro Debug and Serial I/O Toolkit, extensive catalog of foundation IP, and bitstream generation/device programming utilities.

ISE Design Suite DSP Edition is optimized for algorithm, system, and hardware developers with the Xilinx DSP Domain Targeted Design Platform, and includes: System Generator for DSP, AccelDSP(TM) Synthesis Tool and DSP-specific IP, plus all base-level FPGA design tools and technologies in the Logic Edition.

ISE Design Suite Embedded Edition is optimized for embedded system designers (both hardware and software programmers) with the Xilinx Embedded Domain Targeted Design Platform, and includes: the Embedded Development Kit (EDK) with Platform Studio Design Suite, Software Developers Kit (SDK) now also available as a standalone product, embedded-specific IP including the MicroBlaze(TM) soft processor, plus all base-level FPGA design tools and technologies in the Logic Edition.

ISE Design Suite System Edition is optimized for system designers with the Xilinx Connectivity Domain Targeted Design Platform, and includes: all the tools, technologies, and IP in the Logic Edition, DSP Edition and Embedded Edition.

Higher Productivity, Faster Design, Better Results

Xilinx has also improved inter-tool communication throughout the entire design process, created seamless interoperability between all design configurations, and adopted EDA industry-standard FLEXnet licensing solutions to deliver breakthrough performance, power and cost advantages with the ISE Design Suite 11.1 release.

Embedded and DSP flows are more tightly integrated to ease implementation of embedded, DSP, IP and custom blocks into a single system. Each step within the design flow is optimized to facilitate more “turns per day” (design iterations) with new multi-threaded place and route capabilities, SmartXplorer and ExploreAhead support for distributed processing techniques, and second generation SmartGuide(TM) technology delivering 2X faster compile and incremental run times to accelerate timing closure. The ISE Design Suite 11.1 also features advanced power optimization algorithms and unparalleled design visibility with access to the full-featured PlanAhead Design and Analysis software for all Editions. Designers can more effectively evaluate, analyze, and optimize implementation results to achieve faster performance, greater device utilization, and higher design quality.

In addition, ISE Design Suite 11.1 users now have the added flexibility to tailor their installation and monitor usage. New floating licenses allow multiple users in multiple locations to access a single license in order to cost effectively support large or distributed design organizations and help reduce overall project costs. Alternatively, node-locked licenses provide the option for limiting usage to a single machine.

Availability & Pricing

The ISE Design Suite 11.1 with complete domain-specific editions supporting Virtex-5 and Spartan-3 FPGA families is immediately available. Support for Virtex-6 and Spartan-6 FPGAs is available through the ISE Design Suite 11.1 early access program with general public support to follow in the ISE Design Suite 11.2 release.

U.S. list price for ISE Design Suite 11.1 node-locked license starts at: $2,995 for Logic Edition; $3,395 for Embedded Edition; $4,195 for DSP Edition; and $4,595 for System Edition. Flexible floating licensing options are also available. Customers can download full-featured 30-day evaluation versions of ISE Design Suite 11.1 Editions from the Xilinx web site at no charge. For more information about the ISE 11.1 software suite, visit www.xilinx.com/ISE.

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